xref: /openbmc/u-boot/arch/x86/include/asm/io.h (revision dd1033e4)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2000-2002
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  */
6 
7 #ifndef _ASM_IO_H
8 #define _ASM_IO_H
9 
10 #include <linux/compiler.h>
11 
12 /*
13  * This file contains the definitions for the x86 IO instructions
14  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
15  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
16  * versions of the single-IO instructions (inb_p/inw_p/..).
17  *
18  * This file is not meant to be obfuscating: it's just complicated
19  * to (a) handle it all in a way that makes gcc able to optimize it
20  * as well as possible and (b) trying to avoid writing the same thing
21  * over and over again with slight variations and possibly making a
22  * mistake somewhere.
23  */
24 
25 /*
26  * Thanks to James van Artsdalen for a better timing-fix than
27  * the two short jumps: using outb's to a nonexistent port seems
28  * to guarantee better timings even on fast machines.
29  *
30  * On the other hand, I'd like to be sure of a non-existent port:
31  * I feel a bit unsafe about using 0x80 (should be safe, though)
32  *
33  *		Linus
34  */
35 
36  /*
37   *  Bit simplified and optimized by Jan Hubicka
38   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
39   *
40   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
41   *  isa_read[wl] and isa_write[wl] fixed
42   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
43   */
44 
45 #define IO_SPACE_LIMIT 0xffff
46 
47 #include <asm/types.h>
48 
49 
50 #ifdef __KERNEL__
51 
52 
53 /*
54  * readX/writeX() are used to access memory mapped devices. On some
55  * architectures the memory mapped IO stuff needs to be accessed
56  * differently. On the x86 architecture, we just read/write the
57  * memory location directly.
58  */
59 
60 #define readb(addr) (*(volatile unsigned char *) (addr))
61 #define readw(addr) (*(volatile unsigned short *) (addr))
62 #define readl(addr) (*(volatile unsigned int *) (addr))
63 #define readq(addr) (*(volatile unsigned long long *) (addr))
64 #define __raw_readb readb
65 #define __raw_readw readw
66 #define __raw_readl readl
67 #define __raw_readq readq
68 
69 #define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b))
70 #define writew(b,addr) (*(volatile unsigned short *) (addr) = (b))
71 #define writel(b,addr) (*(volatile unsigned int *) (addr) = (b))
72 #define writeq(b,addr) (*(volatile unsigned long long *) (addr) = (b))
73 #define __raw_writeb writeb
74 #define __raw_writew writew
75 #define __raw_writel writel
76 #define __raw_writeq writeq
77 
78 #define memset_io(a,b,c)	memset((a),(b),(c))
79 #define memcpy_fromio(a,b,c)	memcpy((a),(b),(c))
80 #define memcpy_toio(a,b,c)	memcpy((a),(b),(c))
81 
82 #define out_arch(type, endian, a, v)	__raw_write##type(cpu_to_##endian(v), a)
83 #define in_arch(type, endian, a)	endian##_to_cpu(__raw_read##type(a))
84 
85 #define out_le64(a, v)	out_arch(q, le64, a, v)
86 #define out_le32(a, v)	out_arch(l, le32, a, v)
87 #define out_le16(a, v)	out_arch(w, le16, a, v)
88 
89 #define in_le64(a)	in_arch(q, le64, a)
90 #define in_le32(a)	in_arch(l, le32, a)
91 #define in_le16(a)	in_arch(w, le16, a)
92 
93 #define out_be32(a, v)	out_arch(l, be32, a, v)
94 #define out_be16(a, v)	out_arch(w, be16, a, v)
95 
96 #define in_be32(a)	in_arch(l, be32, a)
97 #define in_be16(a)	in_arch(w, be16, a)
98 
99 #define out_8(a, v)	__raw_writeb(v, a)
100 #define in_8(a)		__raw_readb(a)
101 
102 #define clrbits(type, addr, clear) \
103 	out_##type((addr), in_##type(addr) & ~(clear))
104 
105 #define setbits(type, addr, set) \
106 	out_##type((addr), in_##type(addr) | (set))
107 
108 #define clrsetbits(type, addr, clear, set) \
109 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
110 
111 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
112 #define setbits_be32(addr, set) setbits(be32, addr, set)
113 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
114 
115 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
116 #define setbits_le32(addr, set) setbits(le32, addr, set)
117 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
118 
119 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
120 #define setbits_be16(addr, set) setbits(be16, addr, set)
121 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
122 
123 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
124 #define setbits_le16(addr, set) setbits(le16, addr, set)
125 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
126 
127 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
128 #define setbits_8(addr, set) setbits(8, addr, set)
129 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
130 
131 #endif /* __KERNEL__ */
132 
133 #ifdef SLOW_IO_BY_JUMPING
134 #define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:"
135 #else
136 #define __SLOW_DOWN_IO "\noutb %%al,$0xed"
137 #endif
138 
139 #ifdef REALLY_SLOW_IO
140 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
141 #else
142 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO
143 #endif
144 
145 
146 /*
147  * Talk about misusing macros..
148  */
149 #define __OUT1(s,x) \
150 static inline void _out##s(unsigned x value, unsigned short port) {
151 
152 #define __OUT2(s,s1,s2) \
153 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
154 
155 
156 #define __OUT(s,s1,x) \
157 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
158 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));}
159 
160 #define __IN1(s) \
161 static inline RETURN_TYPE _in##s(unsigned short port) { RETURN_TYPE _v;
162 
163 #define __IN2(s,s1,s2) \
164 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
165 
166 #define __IN(s,s1,i...) \
167 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \
168 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; }
169 
170 #define __INS(s) \
171 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
172 { __asm__ __volatile__ ("rep ; ins" #s \
173 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
174 
175 #define __OUTS(s) \
176 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
177 { __asm__ __volatile__ ("rep ; outs" #s \
178 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
179 
180 #define RETURN_TYPE unsigned char
181 __IN(b,"")
182 #undef RETURN_TYPE
183 #define RETURN_TYPE unsigned short
184 __IN(w,"")
185 #undef RETURN_TYPE
186 #define RETURN_TYPE unsigned int
187 __IN(l,"")
188 #undef RETURN_TYPE
189 
190 #define inb(port)	_inb((uintptr_t)(port))
191 #define inw(port)	_inw((uintptr_t)(port))
192 #define inl(port)	_inl((uintptr_t)(port))
193 
194 __OUT(b,"b",char)
195 __OUT(w,"w",short)
196 __OUT(l,,int)
197 
198 #define outb(val, port)	_outb(val, (uintptr_t)(port))
199 #define outw(val, port)	_outw(val, (uintptr_t)(port))
200 #define outl(val, port)	_outl(val, (uintptr_t)(port))
201 
202 __INS(b)
203 __INS(w)
204 __INS(l)
205 
206 __OUTS(b)
207 __OUTS(w)
208 __OUTS(l)
209 
210 /* IO space accessors */
211 #define clrio(type, addr, clear) \
212 	out##type(in##type(addr) & ~(clear), (addr))
213 
214 #define setio(type, addr, set) \
215 	out##type(in##type(addr) | (set), (addr))
216 
217 #define clrsetio(type, addr, clear, set) \
218 	out##type((in##type(addr) & ~(clear)) | (set), (addr))
219 
220 #define clrio_32(addr, clear) clrio(l, addr, clear)
221 #define clrio_16(addr, clear) clrio(w, addr, clear)
222 #define clrio_8(addr, clear) clrio(b, addr, clear)
223 
224 #define setio_32(addr, set) setio(l, addr, set)
225 #define setio_16(addr, set) setio(w, addr, set)
226 #define setio_8(addr, set) setio(b, addr, set)
227 
228 #define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set)
229 #define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set)
230 #define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set)
231 
232 static inline void sync(void)
233 {
234 }
235 
236 /*
237  * TODO: The kernel offers some more advanced versions of barriers, it might
238  * have some advantages to use them instead of the simple one here.
239  */
240 #define dmb()		__asm__ __volatile__ ("" : : : "memory")
241 #define __iormb()	dmb()
242 #define __iowmb()	dmb()
243 
244 /*
245  * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
246  * access or a MMIO access, these functions don't care. The info is
247  * encoded in the hardware mapping set up by the mapping functions
248  * (or the cookie itself, depending on implementation and hw).
249  *
250  * The generic routines don't assume any hardware mappings, and just
251  * encode the PIO/MMIO as part of the cookie. They coldly assume that
252  * the MMIO IO mappings are not in the low address range.
253  *
254  * Architectures for which this is not true can't use this generic
255  * implementation and should do their own copy.
256  */
257 
258 /*
259  * We assume that all the low physical PIO addresses (0-0xffff) always
260  * PIO. That means we can do some sanity checks on the low bits, and
261  * don't need to just take things for granted.
262  */
263 #define PIO_RESERVED	0x10000UL
264 
265 /*
266  * Ugly macros are a way of life.
267  */
268 #define IO_COND(addr, is_pio, is_mmio) do {			\
269 	unsigned long port = (unsigned long __force)addr;	\
270 	if (port >= PIO_RESERVED) {				\
271 		is_mmio;					\
272 	} else {						\
273 		is_pio;						\
274 	}							\
275 } while (0)
276 
277 static inline u8 ioread8(const volatile void __iomem *addr)
278 {
279 	IO_COND(addr, return inb(port), return readb(addr));
280 	return 0xff;
281 }
282 
283 static inline u16 ioread16(const volatile void __iomem *addr)
284 {
285 	IO_COND(addr, return inw(port), return readw(addr));
286 	return 0xffff;
287 }
288 
289 static inline u32 ioread32(const volatile void __iomem *addr)
290 {
291 	IO_COND(addr, return inl(port), return readl(addr));
292 	return 0xffffffff;
293 }
294 
295 static inline void iowrite8(u8 value, volatile void __iomem *addr)
296 {
297 	IO_COND(addr, outb(value, port), writeb(value, addr));
298 }
299 
300 static inline void iowrite16(u16 value, volatile void __iomem *addr)
301 {
302 	IO_COND(addr, outw(value, port), writew(value, addr));
303 }
304 
305 static inline void iowrite32(u32 value, volatile void __iomem *addr)
306 {
307 	IO_COND(addr, outl(value, port), writel(value, addr));
308 }
309 
310 #include <asm-generic/io.h>
311 
312 #endif /* _ASM_IO_H */
313