1 /* 2 * (C) Copyright 2000-2002 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef _ASM_IO_H 9 #define _ASM_IO_H 10 11 #include <linux/compiler.h> 12 13 /* 14 * This file contains the definitions for the x86 IO instructions 15 * inb/inw/inl/outb/outw/outl and the "string versions" of the same 16 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" 17 * versions of the single-IO instructions (inb_p/inw_p/..). 18 * 19 * This file is not meant to be obfuscating: it's just complicated 20 * to (a) handle it all in a way that makes gcc able to optimize it 21 * as well as possible and (b) trying to avoid writing the same thing 22 * over and over again with slight variations and possibly making a 23 * mistake somewhere. 24 */ 25 26 /* 27 * Thanks to James van Artsdalen for a better timing-fix than 28 * the two short jumps: using outb's to a nonexistent port seems 29 * to guarantee better timings even on fast machines. 30 * 31 * On the other hand, I'd like to be sure of a non-existent port: 32 * I feel a bit unsafe about using 0x80 (should be safe, though) 33 * 34 * Linus 35 */ 36 37 /* 38 * Bit simplified and optimized by Jan Hubicka 39 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999. 40 * 41 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added, 42 * isa_read[wl] and isa_write[wl] fixed 43 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> 44 */ 45 46 #define IO_SPACE_LIMIT 0xffff 47 48 #include <asm/types.h> 49 50 51 #ifdef __KERNEL__ 52 53 54 /* 55 * readX/writeX() are used to access memory mapped devices. On some 56 * architectures the memory mapped IO stuff needs to be accessed 57 * differently. On the x86 architecture, we just read/write the 58 * memory location directly. 59 */ 60 61 #define readb(addr) (*(volatile unsigned char *) (addr)) 62 #define readw(addr) (*(volatile unsigned short *) (addr)) 63 #define readl(addr) (*(volatile unsigned int *) (addr)) 64 #define __raw_readb readb 65 #define __raw_readw readw 66 #define __raw_readl readl 67 68 #define writeb(b,addr) (*(volatile unsigned char *) (addr) = (b)) 69 #define writew(b,addr) (*(volatile unsigned short *) (addr) = (b)) 70 #define writel(b,addr) (*(volatile unsigned int *) (addr) = (b)) 71 #define __raw_writeb writeb 72 #define __raw_writew writew 73 #define __raw_writel writel 74 75 #define memset_io(a,b,c) memset((a),(b),(c)) 76 #define memcpy_fromio(a,b,c) memcpy((a),(b),(c)) 77 #define memcpy_toio(a,b,c) memcpy((a),(b),(c)) 78 79 #define write_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a) 80 #define read_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a)) 81 82 #define write_le64(a, v) write_arch(q, le64, a, v) 83 #define write_le32(a, v) write_arch(l, le32, a, v) 84 #define write_le16(a, v) write_arch(w, le16, a, v) 85 86 #define read_le64(a) read_arch(q, le64, a) 87 #define read_le32(a) read_arch(l, le32, a) 88 #define read_le16(a) read_arch(w, le16, a) 89 90 #define write_be32(a, v) write_arch(l, be32, a, v) 91 #define write_be16(a, v) write_arch(w, be16, a, v) 92 93 #define read_be32(a) read_arch(l, be32, a) 94 #define read_be16(a) read_arch(w, be16, a) 95 96 #define write_8(a, v) __raw_writeb(v, a) 97 #define read_8(a) __raw_readb(a) 98 99 #define clrbits(type, addr, clear) \ 100 write_##type((addr), read_##type(addr) & ~(clear)) 101 102 #define setbits(type, addr, set) \ 103 write_##type((addr), read_##type(addr) | (set)) 104 105 #define clrsetbits(type, addr, clear, set) \ 106 write_##type((addr), (read_##type(addr) & ~(clear)) | (set)) 107 108 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear) 109 #define setbits_be32(addr, set) setbits(be32, addr, set) 110 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) 111 112 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear) 113 #define setbits_le32(addr, set) setbits(le32, addr, set) 114 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) 115 116 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear) 117 #define setbits_be16(addr, set) setbits(be16, addr, set) 118 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) 119 120 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear) 121 #define setbits_le16(addr, set) setbits(le16, addr, set) 122 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) 123 124 #define clrbits_8(addr, clear) clrbits(8, addr, clear) 125 #define setbits_8(addr, set) setbits(8, addr, set) 126 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) 127 128 #endif /* __KERNEL__ */ 129 130 #ifdef SLOW_IO_BY_JUMPING 131 #define __SLOW_DOWN_IO "\njmp 1f\n1:\tjmp 1f\n1:" 132 #else 133 #define __SLOW_DOWN_IO "\noutb %%al,$0xed" 134 #endif 135 136 #ifdef REALLY_SLOW_IO 137 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO 138 #else 139 #define __FULL_SLOW_DOWN_IO __SLOW_DOWN_IO 140 #endif 141 142 143 /* 144 * Talk about misusing macros.. 145 */ 146 #define __OUT1(s,x) \ 147 static inline void _out##s(unsigned x value, unsigned short port) { 148 149 #define __OUT2(s,s1,s2) \ 150 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1" 151 152 153 #define __OUT(s,s1,x) \ 154 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \ 155 __OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} 156 157 #define __IN1(s) \ 158 static inline RETURN_TYPE _in##s(unsigned short port) { RETURN_TYPE _v; 159 160 #define __IN2(s,s1,s2) \ 161 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0" 162 163 #define __IN(s,s1,i...) \ 164 __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \ 165 __IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } 166 167 #define __INS(s) \ 168 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \ 169 { __asm__ __volatile__ ("rep ; ins" #s \ 170 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); } 171 172 #define __OUTS(s) \ 173 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \ 174 { __asm__ __volatile__ ("rep ; outs" #s \ 175 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); } 176 177 #define RETURN_TYPE unsigned char 178 __IN(b,"") 179 #undef RETURN_TYPE 180 #define RETURN_TYPE unsigned short 181 __IN(w,"") 182 #undef RETURN_TYPE 183 #define RETURN_TYPE unsigned int 184 __IN(l,"") 185 #undef RETURN_TYPE 186 187 #define inb(port) _inb((uintptr_t)(port)) 188 #define inw(port) _inw((uintptr_t)(port)) 189 #define inl(port) _inl((uintptr_t)(port)) 190 191 __OUT(b,"b",char) 192 __OUT(w,"w",short) 193 __OUT(l,,int) 194 195 #define outb(val, port) _outb(val, (uintptr_t)(port)) 196 #define outw(val, port) _outw(val, (uintptr_t)(port)) 197 #define outl(val, port) _outl(val, (uintptr_t)(port)) 198 199 __INS(b) 200 __INS(w) 201 __INS(l) 202 203 __OUTS(b) 204 __OUTS(w) 205 __OUTS(l) 206 207 /* IO space accessors */ 208 #define clrio(type, addr, clear) \ 209 out##type(in##type(addr) & ~(clear), (addr)) 210 211 #define setio(type, addr, set) \ 212 out##type(in##type(addr) | (set), (addr)) 213 214 #define clrsetio(type, addr, clear, set) \ 215 out##type((in##type(addr) & ~(clear)) | (set), (addr)) 216 217 #define clrio_32(addr, clear) clrio(l, addr, clear) 218 #define clrio_16(addr, clear) clrio(w, addr, clear) 219 #define clrio_8(addr, clear) clrio(b, addr, clear) 220 221 #define setio_32(addr, set) setio(l, addr, set) 222 #define setio_16(addr, set) setio(w, addr, set) 223 #define setio_8(addr, set) setio(b, addr, set) 224 225 #define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set) 226 #define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set) 227 #define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set) 228 229 static inline void sync(void) 230 { 231 } 232 233 /* 234 * Given a physical address and a length, return a virtual address 235 * that can be used to access the memory range with the caching 236 * properties specified by "flags". 237 */ 238 #define MAP_NOCACHE (0) 239 #define MAP_WRCOMBINE (0) 240 #define MAP_WRBACK (0) 241 #define MAP_WRTHROUGH (0) 242 243 static inline void * 244 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) 245 { 246 return (void *)(uintptr_t)paddr; 247 } 248 249 /* 250 * Take down a mapping set up by map_physmem(). 251 */ 252 static inline void unmap_physmem(void *vaddr, unsigned long flags) 253 { 254 255 } 256 257 static inline phys_addr_t virt_to_phys(void * vaddr) 258 { 259 return (phys_addr_t)(uintptr_t)(vaddr); 260 } 261 262 /* 263 * TODO: The kernel offers some more advanced versions of barriers, it might 264 * have some advantages to use them instead of the simple one here. 265 */ 266 #define dmb() __asm__ __volatile__ ("" : : : "memory") 267 #define __iormb() dmb() 268 #define __iowmb() dmb() 269 270 #endif /* _ASM_IO_H */ 271