1 /* 2 * (C) Copyright 2009 3 * Graeme Russ, graeme.russ@gmail.com 4 * 5 * (C) Copyright 2002 6 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ASM_INTERRUPT_H_ 12 #define __ASM_INTERRUPT_H_ 1 13 14 #include <asm/types.h> 15 16 #define SYS_NUM_IRQS 16 17 18 /* Architecture defined exceptions */ 19 enum x86_exception { 20 EXC_DE = 0, 21 EXC_DB, 22 EXC_NMI, 23 EXC_BP, 24 EXC_OF, 25 EXC_BR, 26 EXC_UD, 27 EXC_NM, 28 EXC_DF, 29 EXC_CSO, 30 EXC_TS, 31 EXC_NP, 32 EXC_SS, 33 EXC_GP, 34 EXC_PF, 35 EXC_MF = 16, 36 EXC_AC, 37 EXC_MC, 38 EXC_XM, 39 EXC_VE 40 }; 41 42 /* arch/x86/cpu/interrupts.c */ 43 void set_vector(u8 intnum, void *routine); 44 45 /* Architecture specific functions */ 46 void mask_irq(int irq); 47 void unmask_irq(int irq); 48 void specific_eoi(int irq); 49 50 extern char exception_stack[]; 51 52 /** 53 * configure_irq_trigger() - Configure IRQ triggering 54 * 55 * Switch the given interrupt to be level / edge triggered 56 * 57 * @param int_num legacy interrupt number (3-7, 9-15) 58 * @param is_level_triggered true for level triggered interrupt, false for 59 * edge triggered interrupt 60 */ 61 void configure_irq_trigger(int int_num, bool is_level_triggered); 62 63 void *x86_get_idt(void); 64 65 #endif 66