1 /* 2 * (C) Copyright 2009 3 * Graeme Russ, graeme.russ@gmail.com 4 * 5 * (C) Copyright 2002 6 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ASM_INTERRUPT_H_ 12 #define __ASM_INTERRUPT_H_ 1 13 14 #include <asm/types.h> 15 16 /* Architecture defined exceptions */ 17 enum x86_exception { 18 EXC_DE = 0, 19 EXC_DB, 20 EXC_NMI, 21 EXC_BP, 22 EXC_OF, 23 EXC_BR, 24 EXC_UD, 25 EXC_NM, 26 EXC_DF, 27 EXC_CSO, 28 EXC_TS, 29 EXC_NP, 30 EXC_SS, 31 EXC_GP, 32 EXC_PF, 33 EXC_MF = 16, 34 EXC_AC, 35 EXC_MC, 36 EXC_XM, 37 EXC_VE 38 }; 39 40 /* arch/x86/cpu/interrupts.c */ 41 void set_vector(u8 intnum, void *routine); 42 43 /* Architecture specific functions */ 44 void mask_irq(int irq); 45 void unmask_irq(int irq); 46 void specific_eoi(int irq); 47 48 extern char exception_stack[]; 49 50 /** 51 * configure_irq_trigger() - Configure IRQ triggering 52 * 53 * Switch the given interrupt to be level / edge triggered 54 * 55 * @param int_num legacy interrupt number (3-7, 9-15) 56 * @param is_level_triggered true for level triggered interrupt, false for 57 * edge triggered interrupt 58 */ 59 void configure_irq_trigger(int int_num, bool is_level_triggered); 60 61 void *x86_get_idt(void); 62 63 #endif 64