xref: /openbmc/u-boot/arch/x86/include/asm/interrupt.h (revision 6c505271)
1fea25720SGraeme Russ /*
2fea25720SGraeme Russ  * (C) Copyright 2009
3fea25720SGraeme Russ  * Graeme Russ, graeme.russ@gmail.com
4fea25720SGraeme Russ  *
5fea25720SGraeme Russ  * (C) Copyright 2002
6fa82f871SAlbert ARIBAUD  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
7fea25720SGraeme Russ  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9fea25720SGraeme Russ  */
10fea25720SGraeme Russ 
11fea25720SGraeme Russ #ifndef __ASM_INTERRUPT_H_
12fea25720SGraeme Russ #define __ASM_INTERRUPT_H_ 1
13fea25720SGraeme Russ 
14fea25720SGraeme Russ #include <asm/types.h>
15fea25720SGraeme Russ 
16*6c505271SBin Meng #define SYS_NUM_IRQS	16
17*6c505271SBin Meng 
18013cf483SBin Meng /* Architecture defined exceptions */
19013cf483SBin Meng enum x86_exception {
20013cf483SBin Meng 	EXC_DE = 0,
21013cf483SBin Meng 	EXC_DB,
22013cf483SBin Meng 	EXC_NMI,
23013cf483SBin Meng 	EXC_BP,
24013cf483SBin Meng 	EXC_OF,
25013cf483SBin Meng 	EXC_BR,
26013cf483SBin Meng 	EXC_UD,
27013cf483SBin Meng 	EXC_NM,
28013cf483SBin Meng 	EXC_DF,
29013cf483SBin Meng 	EXC_CSO,
30013cf483SBin Meng 	EXC_TS,
31013cf483SBin Meng 	EXC_NP,
32013cf483SBin Meng 	EXC_SS,
33013cf483SBin Meng 	EXC_GP,
34013cf483SBin Meng 	EXC_PF,
35013cf483SBin Meng 	EXC_MF = 16,
36013cf483SBin Meng 	EXC_AC,
37013cf483SBin Meng 	EXC_MC,
38013cf483SBin Meng 	EXC_XM,
39013cf483SBin Meng 	EXC_VE
40013cf483SBin Meng };
41013cf483SBin Meng 
42fea25720SGraeme Russ /* arch/x86/cpu/interrupts.c */
43fea25720SGraeme Russ void set_vector(u8 intnum, void *routine);
44fea25720SGraeme Russ 
45fea25720SGraeme Russ /* Architecture specific functions */
46fea25720SGraeme Russ void mask_irq(int irq);
47fea25720SGraeme Russ void unmask_irq(int irq);
48fea25720SGraeme Russ void specific_eoi(int irq);
49fea25720SGraeme Russ 
50fea25720SGraeme Russ extern char exception_stack[];
51fea25720SGraeme Russ 
52a0bd851eSSimon Glass /**
53a0bd851eSSimon Glass  * configure_irq_trigger() - Configure IRQ triggering
54a0bd851eSSimon Glass  *
55a0bd851eSSimon Glass  * Switch the given interrupt to be level / edge triggered
56a0bd851eSSimon Glass  *
57a0bd851eSSimon Glass  * @param int_num legacy interrupt number (3-7, 9-15)
58a0bd851eSSimon Glass  * @param is_level_triggered true for level triggered interrupt, false for
59a0bd851eSSimon Glass  *	edge triggered interrupt
60a0bd851eSSimon Glass  */
61a0bd851eSSimon Glass void configure_irq_trigger(int int_num, bool is_level_triggered);
62a0bd851eSSimon Glass 
636f41e0e7SSimon Glass void *x86_get_idt(void);
646f41e0e7SSimon Glass 
65fea25720SGraeme Russ #endif
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