1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2fea25720SGraeme Russ /* 3fea25720SGraeme Russ * (C) Copyright 2009 4fea25720SGraeme Russ * Graeme Russ, graeme.russ@gmail.com 5fea25720SGraeme Russ * 6fea25720SGraeme Russ * (C) Copyright 2002 7fa82f871SAlbert ARIBAUD * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 8fea25720SGraeme Russ */ 9fea25720SGraeme Russ 10fea25720SGraeme Russ #ifndef __ASM_INTERRUPT_H_ 11fea25720SGraeme Russ #define __ASM_INTERRUPT_H_ 1 12fea25720SGraeme Russ 13fea25720SGraeme Russ #include <asm/types.h> 14fea25720SGraeme Russ 156c505271SBin Meng #define SYS_NUM_IRQS 16 166c505271SBin Meng 17013cf483SBin Meng /* Architecture defined exceptions */ 18013cf483SBin Meng enum x86_exception { 19013cf483SBin Meng EXC_DE = 0, 20013cf483SBin Meng EXC_DB, 21013cf483SBin Meng EXC_NMI, 22013cf483SBin Meng EXC_BP, 23013cf483SBin Meng EXC_OF, 24013cf483SBin Meng EXC_BR, 25013cf483SBin Meng EXC_UD, 26013cf483SBin Meng EXC_NM, 27013cf483SBin Meng EXC_DF, 28013cf483SBin Meng EXC_CSO, 29013cf483SBin Meng EXC_TS, 30013cf483SBin Meng EXC_NP, 31013cf483SBin Meng EXC_SS, 32013cf483SBin Meng EXC_GP, 33013cf483SBin Meng EXC_PF, 34013cf483SBin Meng EXC_MF = 16, 35013cf483SBin Meng EXC_AC, 36013cf483SBin Meng EXC_MC, 37013cf483SBin Meng EXC_XM, 38013cf483SBin Meng EXC_VE 39013cf483SBin Meng }; 40013cf483SBin Meng 41fea25720SGraeme Russ /* arch/x86/cpu/interrupts.c */ 42fea25720SGraeme Russ void set_vector(u8 intnum, void *routine); 43fea25720SGraeme Russ 44fea25720SGraeme Russ /* Architecture specific functions */ 45fea25720SGraeme Russ void mask_irq(int irq); 46fea25720SGraeme Russ void unmask_irq(int irq); 47fea25720SGraeme Russ void specific_eoi(int irq); 48fea25720SGraeme Russ 49fea25720SGraeme Russ extern char exception_stack[]; 50fea25720SGraeme Russ 51a0bd851eSSimon Glass /** 52a0bd851eSSimon Glass * configure_irq_trigger() - Configure IRQ triggering 53a0bd851eSSimon Glass * 54a0bd851eSSimon Glass * Switch the given interrupt to be level / edge triggered 55a0bd851eSSimon Glass * 56a0bd851eSSimon Glass * @param int_num legacy interrupt number (3-7, 9-15) 57a0bd851eSSimon Glass * @param is_level_triggered true for level triggered interrupt, false for 58a0bd851eSSimon Glass * edge triggered interrupt 59a0bd851eSSimon Glass */ 60a0bd851eSSimon Glass void configure_irq_trigger(int int_num, bool is_level_triggered); 61a0bd851eSSimon Glass 626f41e0e7SSimon Glass void *x86_get_idt(void); 636f41e0e7SSimon Glass 64fea25720SGraeme Russ #endif 65