1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __ASM_INTEL_REGS_H 8 #define __ASM_INTEL_REGS_H 9 10 /* Access the memory-controller hub */ 11 #define MCH_BASE_ADDRESS 0xfed10000 12 #define MCH_BASE_SIZE 0x8000 13 #define MCHBAR_REG(reg) (MCH_BASE_ADDRESS + (reg)) 14 15 #define MCHBAR_PEI_VERSION 0x5034 16 #define MCH_PKG_POWER_LIMIT_LO 0x59a0 17 #define MCH_PKG_POWER_LIMIT_HI 0x59a4 18 #define MCH_DDR_POWER_LIMIT_LO 0x58e0 19 #define MCH_DDR_POWER_LIMIT_HI 0x58e4 20 21 /* Access the Root Complex Register Block */ 22 #define RCB_BASE_ADDRESS 0xfed1c000 23 #define RCB_REG(reg) (RCB_BASE_ADDRESS + (reg)) 24 25 #define SOFT_RESET_CTRL 0x38f4 26 #define SOFT_RESET_DATA 0x38f8 27 28 #endif 29