xref: /openbmc/u-boot/arch/x86/include/asm/gpio.h (revision 1b4f25ff)
155ae10f8SBill Richardson /*
255ae10f8SBill Richardson  * Copyright (c) 2012, Google Inc. All rights reserved.
3*1b4f25ffSSimon Glass  * SPDX-License-Identifier:	GPL-2.0
455ae10f8SBill Richardson  */
555ae10f8SBill Richardson 
655ae10f8SBill Richardson #ifndef _X86_GPIO_H_
755ae10f8SBill Richardson #define _X86_GPIO_H_
855ae10f8SBill Richardson 
9*1b4f25ffSSimon Glass #include <linux/compiler.h>
10c15b0b86SSimon Glass #include <asm/arch/gpio.h>
1155ae10f8SBill Richardson #include <asm-generic/gpio.h>
1255ae10f8SBill Richardson 
13*1b4f25ffSSimon Glass struct ich6_bank_platdata {
14*1b4f25ffSSimon Glass 	uint32_t base_addr;
15*1b4f25ffSSimon Glass 	const char *bank_name;
16*1b4f25ffSSimon Glass };
17*1b4f25ffSSimon Glass 
18*1b4f25ffSSimon Glass #define GPIO_MODE_NATIVE	0
19*1b4f25ffSSimon Glass #define GPIO_MODE_GPIO		1
20*1b4f25ffSSimon Glass #define GPIO_MODE_NONE		1
21*1b4f25ffSSimon Glass 
22*1b4f25ffSSimon Glass #define GPIO_DIR_OUTPUT		0
23*1b4f25ffSSimon Glass #define GPIO_DIR_INPUT		1
24*1b4f25ffSSimon Glass 
25*1b4f25ffSSimon Glass #define GPIO_NO_INVERT		0
26*1b4f25ffSSimon Glass #define GPIO_INVERT		1
27*1b4f25ffSSimon Glass 
28*1b4f25ffSSimon Glass #define GPIO_LEVEL_LOW		0
29*1b4f25ffSSimon Glass #define GPIO_LEVEL_HIGH		1
30*1b4f25ffSSimon Glass 
31*1b4f25ffSSimon Glass #define GPIO_NO_BLINK		0
32*1b4f25ffSSimon Glass #define GPIO_BLINK		1
33*1b4f25ffSSimon Glass 
34*1b4f25ffSSimon Glass #define GPIO_RESET_PWROK	0
35*1b4f25ffSSimon Glass #define GPIO_RESET_RSMRST	1
36*1b4f25ffSSimon Glass 
37*1b4f25ffSSimon Glass struct pch_gpio_set1 {
38*1b4f25ffSSimon Glass 	u32 gpio0:1;
39*1b4f25ffSSimon Glass 	u32 gpio1:1;
40*1b4f25ffSSimon Glass 	u32 gpio2:1;
41*1b4f25ffSSimon Glass 	u32 gpio3:1;
42*1b4f25ffSSimon Glass 	u32 gpio4:1;
43*1b4f25ffSSimon Glass 	u32 gpio5:1;
44*1b4f25ffSSimon Glass 	u32 gpio6:1;
45*1b4f25ffSSimon Glass 	u32 gpio7:1;
46*1b4f25ffSSimon Glass 	u32 gpio8:1;
47*1b4f25ffSSimon Glass 	u32 gpio9:1;
48*1b4f25ffSSimon Glass 	u32 gpio10:1;
49*1b4f25ffSSimon Glass 	u32 gpio11:1;
50*1b4f25ffSSimon Glass 	u32 gpio12:1;
51*1b4f25ffSSimon Glass 	u32 gpio13:1;
52*1b4f25ffSSimon Glass 	u32 gpio14:1;
53*1b4f25ffSSimon Glass 	u32 gpio15:1;
54*1b4f25ffSSimon Glass 	u32 gpio16:1;
55*1b4f25ffSSimon Glass 	u32 gpio17:1;
56*1b4f25ffSSimon Glass 	u32 gpio18:1;
57*1b4f25ffSSimon Glass 	u32 gpio19:1;
58*1b4f25ffSSimon Glass 	u32 gpio20:1;
59*1b4f25ffSSimon Glass 	u32 gpio21:1;
60*1b4f25ffSSimon Glass 	u32 gpio22:1;
61*1b4f25ffSSimon Glass 	u32 gpio23:1;
62*1b4f25ffSSimon Glass 	u32 gpio24:1;
63*1b4f25ffSSimon Glass 	u32 gpio25:1;
64*1b4f25ffSSimon Glass 	u32 gpio26:1;
65*1b4f25ffSSimon Glass 	u32 gpio27:1;
66*1b4f25ffSSimon Glass 	u32 gpio28:1;
67*1b4f25ffSSimon Glass 	u32 gpio29:1;
68*1b4f25ffSSimon Glass 	u32 gpio30:1;
69*1b4f25ffSSimon Glass 	u32 gpio31:1;
70*1b4f25ffSSimon Glass } __packed;
71*1b4f25ffSSimon Glass 
72*1b4f25ffSSimon Glass struct pch_gpio_set2 {
73*1b4f25ffSSimon Glass 	u32 gpio32:1;
74*1b4f25ffSSimon Glass 	u32 gpio33:1;
75*1b4f25ffSSimon Glass 	u32 gpio34:1;
76*1b4f25ffSSimon Glass 	u32 gpio35:1;
77*1b4f25ffSSimon Glass 	u32 gpio36:1;
78*1b4f25ffSSimon Glass 	u32 gpio37:1;
79*1b4f25ffSSimon Glass 	u32 gpio38:1;
80*1b4f25ffSSimon Glass 	u32 gpio39:1;
81*1b4f25ffSSimon Glass 	u32 gpio40:1;
82*1b4f25ffSSimon Glass 	u32 gpio41:1;
83*1b4f25ffSSimon Glass 	u32 gpio42:1;
84*1b4f25ffSSimon Glass 	u32 gpio43:1;
85*1b4f25ffSSimon Glass 	u32 gpio44:1;
86*1b4f25ffSSimon Glass 	u32 gpio45:1;
87*1b4f25ffSSimon Glass 	u32 gpio46:1;
88*1b4f25ffSSimon Glass 	u32 gpio47:1;
89*1b4f25ffSSimon Glass 	u32 gpio48:1;
90*1b4f25ffSSimon Glass 	u32 gpio49:1;
91*1b4f25ffSSimon Glass 	u32 gpio50:1;
92*1b4f25ffSSimon Glass 	u32 gpio51:1;
93*1b4f25ffSSimon Glass 	u32 gpio52:1;
94*1b4f25ffSSimon Glass 	u32 gpio53:1;
95*1b4f25ffSSimon Glass 	u32 gpio54:1;
96*1b4f25ffSSimon Glass 	u32 gpio55:1;
97*1b4f25ffSSimon Glass 	u32 gpio56:1;
98*1b4f25ffSSimon Glass 	u32 gpio57:1;
99*1b4f25ffSSimon Glass 	u32 gpio58:1;
100*1b4f25ffSSimon Glass 	u32 gpio59:1;
101*1b4f25ffSSimon Glass 	u32 gpio60:1;
102*1b4f25ffSSimon Glass 	u32 gpio61:1;
103*1b4f25ffSSimon Glass 	u32 gpio62:1;
104*1b4f25ffSSimon Glass 	u32 gpio63:1;
105*1b4f25ffSSimon Glass } __packed;
106*1b4f25ffSSimon Glass 
107*1b4f25ffSSimon Glass struct pch_gpio_set3 {
108*1b4f25ffSSimon Glass 	u32 gpio64:1;
109*1b4f25ffSSimon Glass 	u32 gpio65:1;
110*1b4f25ffSSimon Glass 	u32 gpio66:1;
111*1b4f25ffSSimon Glass 	u32 gpio67:1;
112*1b4f25ffSSimon Glass 	u32 gpio68:1;
113*1b4f25ffSSimon Glass 	u32 gpio69:1;
114*1b4f25ffSSimon Glass 	u32 gpio70:1;
115*1b4f25ffSSimon Glass 	u32 gpio71:1;
116*1b4f25ffSSimon Glass 	u32 gpio72:1;
117*1b4f25ffSSimon Glass 	u32 gpio73:1;
118*1b4f25ffSSimon Glass 	u32 gpio74:1;
119*1b4f25ffSSimon Glass 	u32 gpio75:1;
120*1b4f25ffSSimon Glass } __packed;
121*1b4f25ffSSimon Glass 
122*1b4f25ffSSimon Glass /*
123*1b4f25ffSSimon Glass  * This hilariously complex structure came from Coreboot. The
124*1b4f25ffSSimon Glass  * setup_pch_gpios() function uses it. It could be move to device tree, or
125*1b4f25ffSSimon Glass  * adjust to use masks instead of bitfields.
126*1b4f25ffSSimon Glass  */
127*1b4f25ffSSimon Glass struct pch_gpio_map {
128*1b4f25ffSSimon Glass 	struct {
129*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *mode;
130*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *direction;
131*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *level;
132*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *reset;
133*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *invert;
134*1b4f25ffSSimon Glass 		const struct pch_gpio_set1 *blink;
135*1b4f25ffSSimon Glass 	} set1;
136*1b4f25ffSSimon Glass 	struct {
137*1b4f25ffSSimon Glass 		const struct pch_gpio_set2 *mode;
138*1b4f25ffSSimon Glass 		const struct pch_gpio_set2 *direction;
139*1b4f25ffSSimon Glass 		const struct pch_gpio_set2 *level;
140*1b4f25ffSSimon Glass 		const struct pch_gpio_set2 *reset;
141*1b4f25ffSSimon Glass 	} set2;
142*1b4f25ffSSimon Glass 	struct {
143*1b4f25ffSSimon Glass 		const struct pch_gpio_set3 *mode;
144*1b4f25ffSSimon Glass 		const struct pch_gpio_set3 *direction;
145*1b4f25ffSSimon Glass 		const struct pch_gpio_set3 *level;
146*1b4f25ffSSimon Glass 		const struct pch_gpio_set3 *reset;
147*1b4f25ffSSimon Glass 	} set3;
148*1b4f25ffSSimon Glass };
149*1b4f25ffSSimon Glass 
150*1b4f25ffSSimon Glass void ich_gpio_set_gpio_map(const struct pch_gpio_map *map);
151*1b4f25ffSSimon Glass 
15255ae10f8SBill Richardson #endif /* _X86_GPIO_H_ */
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