1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2002-2010
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  */
6 
7 #ifndef	__ASM_GBL_DATA_H
8 #define __ASM_GBL_DATA_H
9 
10 #ifndef __ASSEMBLY__
11 
12 #include <asm/processor.h>
13 
14 enum pei_boot_mode_t {
15 	PEI_BOOT_NONE = 0,
16 	PEI_BOOT_SOFT_RESET,
17 	PEI_BOOT_RESUME,
18 
19 };
20 
21 struct dimm_info {
22 	uint32_t dimm_size;
23 	uint16_t ddr_type;
24 	uint16_t ddr_frequency;
25 	uint8_t rank_per_dimm;
26 	uint8_t channel_num;
27 	uint8_t dimm_num;
28 	uint8_t bank_locator;
29 	/* The 5th byte is '\0' for the end of string */
30 	uint8_t serial[5];
31 	/* The 19th byte is '\0' for the end of string */
32 	uint8_t module_part_number[19];
33 	uint16_t mod_id;
34 	uint8_t mod_type;
35 	uint8_t bus_width;
36 } __packed;
37 
38 struct pei_memory_info {
39 	uint8_t dimm_cnt;
40 	/* Maximum num of dimm is 8 */
41 	struct dimm_info dimm[8];
42 } __packed;
43 
44 struct memory_area {
45 	uint64_t start;
46 	uint64_t size;
47 };
48 
49 struct memory_info {
50 	int num_areas;
51 	uint64_t total_memory;
52 	uint64_t total_32bit_memory;
53 	struct memory_area area[CONFIG_NR_DRAM_BANKS];
54 };
55 
56 #define MAX_MTRR_REQUESTS	8
57 
58 /**
59  * A request for a memory region to be set up in a particular way. These
60  * requests are processed before board_init_r() is called. They are generally
61  * optional and can be ignored with some performance impact.
62  */
63 struct mtrr_request {
64 	int type;		/* MTRR_TYPE_... */
65 	uint64_t start;
66 	uint64_t size;
67 };
68 
69 /* Architecture-specific global data */
70 struct arch_global_data {
71 	u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16);
72 	struct global_data *gd_addr;	/* Location of Global Data */
73 	uint8_t x86;			/* CPU family */
74 	uint8_t x86_vendor;		/* CPU vendor */
75 	uint8_t x86_model;
76 	uint8_t x86_mask;
77 	uint32_t x86_device;
78 	uint64_t tsc_base;		/* Initial value returned by rdtsc() */
79 	unsigned long clock_rate;	/* Clock rate of timer in Hz */
80 	void *new_fdt;			/* Relocated FDT */
81 	uint32_t bist;			/* Built-in self test value */
82 	enum pei_boot_mode_t pei_boot_mode;
83 	const struct pch_gpio_map *gpio_map;	/* board GPIO map */
84 	struct memory_info meminfo;	/* Memory information */
85 	struct pei_memory_info pei_meminfo;	/* PEI memory information */
86 #ifdef CONFIG_HAVE_FSP
87 	void *hob_list;			/* FSP HOB list */
88 #endif
89 	struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
90 	int mtrr_req_count;
91 	int has_mtrr;
92 	/* MRC training data to save for the next boot */
93 	char *mrc_output;
94 	unsigned int mrc_output_len;
95 	ulong table;			/* Table pointer from previous loader */
96 	int turbo_state;		/* Current turbo state */
97 	struct irq_routing_table *pirq_routing_table;
98 #ifdef CONFIG_SEABIOS
99 	u32 high_table_ptr;
100 	u32 high_table_limit;
101 #endif
102 #ifdef CONFIG_HAVE_ACPI_RESUME
103 	int prev_sleep_state;		/* Previous sleep state ACPI_S0/1../5 */
104 	ulong backup_mem;		/* Backup memory address for S3 */
105 #endif
106 };
107 
108 #endif
109 
110 #include <asm-generic/global_data.h>
111 
112 #ifndef __ASSEMBLY__
113 # if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64)
114 
115 /* TODO(sjg@chromium.org): Consider using a fixed register for gd on x86_64 */
116 #define gd global_data_ptr
117 
118 #define DECLARE_GLOBAL_DATA_PTR   extern struct global_data *global_data_ptr
119 # else
120 static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
121 {
122 	gd_t *gd_ptr;
123 
124 #if CONFIG_IS_ENABLED(X86_64)
125 	asm volatile("fs mov 0, %0\n" : "=r" (gd_ptr));
126 #else
127 	asm volatile("fs movl 0, %0\n" : "=r" (gd_ptr));
128 #endif
129 
130 	return gd_ptr;
131 }
132 
133 #define gd	get_fs_gd_ptr()
134 
135 #define DECLARE_GLOBAL_DATA_PTR
136 # endif
137 
138 #endif
139 
140 /*
141  * Our private Global Data Flags
142  */
143 #define GD_FLG_COLD_BOOT	0x10000	/* Cold Boot */
144 #define GD_FLG_WARM_BOOT	0x20000	/* Warm Boot */
145 
146 #endif /* __ASM_GBL_DATA_H */
147