xref: /openbmc/u-boot/arch/x86/include/asm/fsp/fsp_api.h (revision dd1033e4)
1 /* SPDX-License-Identifier: Intel */
2 /*
3  * Copyright (C) 2013, Intel Corporation
4  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
5  */
6 
7 #ifndef __FSP_API_H__
8 #define __FSP_API_H__
9 
10 #include <linux/linkage.h>
11 
12 /*
13  * FSP common configuration structure.
14  * This needs to be included in the platform-specific struct fsp_config_data.
15  */
16 struct fsp_cfg_common {
17 	struct fsp_header	*fsp_hdr;
18 	u32			stack_top;
19 	u32			boot_mode;
20 };
21 
22 /*
23  * FspInit continuation function prototype.
24  * Control will be returned to this callback function after FspInit API call.
25  */
26 typedef void (*fsp_continuation_f)(u32 status, void *hob_list);
27 
28 struct fsp_init_params {
29 	/* Non-volatile storage buffer pointer */
30 	void			*nvs_buf;
31 	/* Runtime buffer pointer */
32 	void			*rt_buf;
33 	/* Continuation function address */
34 	fsp_continuation_f	continuation;
35 };
36 
37 struct common_buf {
38 	/*
39 	 * Stack top pointer used by the bootloader. The new stack frame will be
40 	 * set up at this location after FspInit API call.
41 	 */
42 	u32	stack_top;
43 	u32	boot_mode;	/* Current system boot mode */
44 	void	*upd_data;	/* User platform configuraiton data region */
45 	u32	tolum_size;	/* Top of low usable memory size (FSP 1.1) */
46 	u32	reserved[6];	/* Reserved */
47 };
48 
49 enum fsp_phase {
50 	/* Notification code for post PCI enuermation */
51 	INIT_PHASE_PCI	= 0x20,
52 	/* Notification code before transfering control to the payload */
53 	INIT_PHASE_BOOT	= 0x40
54 };
55 
56 struct fsp_notify_params {
57 	/* Notification phase used for NotifyPhase API */
58 	enum fsp_phase	phase;
59 };
60 
61 /* FspInit API function prototype */
62 typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params);
63 
64 /* FspNotify API function prototype */
65 typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params);
66 
67 #endif
68