xref: /openbmc/u-boot/arch/x86/include/asm/fsp/fsp_api.h (revision cf0bcd7d)
1 /*
2  * Copyright (C) 2013, Intel Corporation
3  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4  *
5  * SPDX-License-Identifier:	Intel
6  */
7 
8 #ifndef __FSP_API_H__
9 #define __FSP_API_H__
10 
11 #include <linux/linkage.h>
12 
13 /*
14  * FSP common configuration structure.
15  * This needs to be included in the platform-specific struct fsp_config_data.
16  */
17 struct fsp_cfg_common {
18 	struct fsp_header	*fsp_hdr;
19 	u32			stack_top;
20 	u32			boot_mode;
21 };
22 
23 /*
24  * FspInit continuation function prototype.
25  * Control will be returned to this callback function after FspInit API call.
26  */
27 typedef void (*fsp_continuation_f)(u32 status, void *hob_list);
28 
29 struct fsp_init_params {
30 	/* Non-volatile storage buffer pointer */
31 	void			*nvs_buf;
32 	/* Runtime buffer pointer */
33 	void			*rt_buf;
34 	/* Continuation function address */
35 	fsp_continuation_f	continuation;
36 };
37 
38 struct common_buf {
39 	/*
40 	 * Stack top pointer used by the bootloader. The new stack frame will be
41 	 * set up at this location after FspInit API call.
42 	 */
43 	u32	stack_top;
44 	u32	boot_mode;	/* Current system boot mode */
45 	void	*upd_data;	/* User platform configuraiton data region */
46 	u32	tolum_size;	/* Top of low usable memory size (FSP 1.1) */
47 	u32	reserved[6];	/* Reserved */
48 };
49 
50 enum fsp_phase {
51 	/* Notification code for post PCI enuermation */
52 	INIT_PHASE_PCI	= 0x20,
53 	/* Notification code before transfering control to the payload */
54 	INIT_PHASE_BOOT	= 0x40
55 };
56 
57 struct fsp_notify_params {
58 	/* Notification phase used for NotifyPhase API */
59 	enum fsp_phase	phase;
60 };
61 
62 /* FspInit API function prototype */
63 typedef asmlinkage u32 (*fsp_init_f)(struct fsp_init_params *params);
64 
65 /* FspNotify API function prototype */
66 typedef asmlinkage u32 (*fsp_notify_f)(struct fsp_notify_params *params);
67 
68 #endif
69