1/* 2 * Copyright (c) 2017 Intel Corporation 3 * 4 * Partially based on southcluster.asl for other x86 platforms 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9Device (PCI0) 10{ 11 Name (_HID, EISAID("PNP0A08")) /* PCIe */ 12 Name (_CID, EISAID("PNP0A03")) /* PCI */ 13 14 Name (_ADR, 0) 15 Name (_BBN, 0) 16 17 Name (MCRS, ResourceTemplate() 18 { 19 /* Bus Numbers */ 20 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, 21 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) 22 23 /* IO Region 0 */ 24 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 25 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) 26 27 /* PCI Config Space */ 28 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) 29 30 /* IO Region 1 */ 31 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 32 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) 33 34 /* GPIO Low Memory Region */ 35 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 36 Cacheable, ReadWrite, 37 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000, 38 0x00000010, , , GP00) 39 40 /* PSH Memory Region 0 */ 41 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 42 Cacheable, ReadWrite, 43 0x00000000, 0x04819000, 0x04898fff, 0x00000000, 44 0x00080000, , , PSH0) 45 46 /* PSH Memory Region 1 */ 47 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 48 Cacheable, ReadWrite, 49 0x00000000, 0x04919000, 0x04920fff, 0x00000000, 50 0x00008000, , , PSH1) 51 52 /* SST Memory Region */ 53 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 54 Cacheable, ReadWrite, 55 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000, 56 0x00200000, , , SST0) 57 58 /* PCI Memory Region */ 59 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 60 Cacheable, ReadWrite, 61 0x00000000, 0x80000000, 0xffffffff, 0x00000000, 62 0x80000000, , , PMEM) 63 }) 64 65 Method (_CRS, 0, Serialized) 66 { 67 Return (MCRS) 68 } 69 70 Method (_OSC, 4) 71 { 72 /* Check for proper GUID */ 73 If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) { 74 /* Let OS control everything */ 75 Return (Arg3) 76 } Else { 77 /* Unrecognized UUID */ 78 CreateDWordField(Arg3, 0, CDW1) 79 Or(CDW1, 4, CDW1) 80 Return (Arg3) 81 } 82 } 83 84 Device (SDHC) 85 { 86 Name (_ADR, 0x00010003) 87 Name (_DEP, Package (0x01) 88 { 89 GPIO 90 }) 91 Name (PSTS, Zero) 92 93 Method (_STA) 94 { 95 Return (STA_VISIBLE) 96 } 97 98 Method (_PS3, 0, NotSerialized) 99 { 100 } 101 102 Method (_PS0, 0, NotSerialized) 103 { 104 If (PSTS == Zero) 105 { 106 If (^^GPIO.AVBL == One) 107 { 108 ^^GPIO.WFD3 = One 109 PSTS = One 110 } 111 } 112 } 113 114 /* BCM43340 */ 115 Device (BRC1) 116 { 117 Name (_ADR, 0x01) 118 Name (_DEP, Package (0x01) 119 { 120 GPIO 121 }) 122 123 Method (_STA) 124 { 125 Return (STA_VISIBLE) 126 } 127 128 Method (_RMV, 0, NotSerialized) 129 { 130 Return (Zero) 131 } 132 133 Method (_PS3, 0, NotSerialized) 134 { 135 If (^^^GPIO.AVBL == One) 136 { 137 ^^^GPIO.WFD3 = Zero 138 PSTS = Zero 139 } 140 } 141 142 Method (_PS0, 0, NotSerialized) 143 { 144 If (PSTS == Zero) 145 { 146 If (^^^GPIO.AVBL == One) 147 { 148 ^^^GPIO.WFD3 = One 149 PSTS = One 150 } 151 } 152 } 153 } 154 155 Device (BRC2) 156 { 157 Name (_ADR, 0x02) 158 Method (_STA, 0, NotSerialized) 159 { 160 Return (STA_VISIBLE) 161 } 162 163 Method (_RMV, 0, NotSerialized) 164 { 165 Return (Zero) 166 } 167 } 168 } 169 170 Device (SPI5) 171 { 172 Name (_ADR, 0x00070001) 173 Name (RBUF, ResourceTemplate() 174 { 175 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 176 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 91 } 177 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 178 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 92 } 179 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 180 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 93 } 181 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 182 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 94 } 183 }) 184 185 Method (_CRS, 0, NotSerialized) 186 { 187 Return (RBUF) 188 } 189 190 /* 191 * See 192 * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt 193 * for more information about GPIO bindings. 194 */ 195 Name (_DSD, Package () { 196 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 197 Package () { 198 Package () { 199 "cs-gpios", Package () { 200 ^SPI5, 0, 0, 0, 201 ^SPI5, 1, 0, 0, 202 ^SPI5, 2, 0, 0, 203 ^SPI5, 3, 0, 0, 204 }, 205 }, 206 } 207 }) 208 209 Method (_STA, 0, NotSerialized) 210 { 211 Return (STA_VISIBLE) 212 } 213 } 214 215 Device (I2C1) 216 { 217 Name (_ADR, 0x00080000) 218 219 Method (_STA, 0, NotSerialized) 220 { 221 Return (STA_VISIBLE) 222 } 223 } 224 225 Device (GPIO) 226 { 227 Name (_ADR, 0x000c0000) 228 229 Method (_STA) 230 { 231 Return (STA_VISIBLE) 232 } 233 234 Name (AVBL, Zero) 235 Method (_REG, 2, NotSerialized) 236 { 237 If (Arg0 == 0x08) 238 { 239 AVBL = Arg1 240 } 241 } 242 243 OperationRegion (GPOP, GeneralPurposeIo, 0, 1) 244 Field (GPOP, ByteAcc, NoLock, Preserve) 245 { 246 Connection ( 247 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 248 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 56 } 249 ), 250 WFD3, 1, 251 } 252 } 253 254 Device (PWM0) 255 { 256 Name (_ADR, 0x00170000) 257 258 Method (_STA, 0, NotSerialized) 259 { 260 Return (STA_VISIBLE) 261 } 262 } 263} 264 265Device (FLIS) 266{ 267 Name (_HID, "PRP0001") 268 Name (_DDN, "Intel Merrifield Family-Level Interface Shim") 269 Name (RBUF, ResourceTemplate() 270 { 271 Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, ) 272 PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 } 273 PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 } 274 PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 } 275 PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 } 276 PinGroup("pwm0", ResourceProducer, ) { 144 } 277 PinGroup("pwm1", ResourceProducer, ) { 145 } 278 PinGroup("pwm2", ResourceProducer, ) { 132 } 279 PinGroup("pwm3", ResourceProducer, ) { 133 } 280 }) 281 282 Method (_CRS, 0, NotSerialized) 283 { 284 Return (RBUF) 285 } 286 287 Name (_DSD, Package () { 288 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 289 Package () { 290 Package () {"compatible", "intel,merrifield-pinctrl"}, 291 } 292 }) 293 294 Method (_STA, 0, NotSerialized) 295 { 296 Return (STA_VISIBLE) 297 } 298} 299