1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2017 Intel Corporation 4 * 5 * Partially based on southcluster.asl for other x86 platforms 6 */ 7 8Device (PCI0) 9{ 10 Name (_HID, EISAID("PNP0A08")) /* PCIe */ 11 Name (_CID, EISAID("PNP0A03")) /* PCI */ 12 13 Name (_ADR, 0) 14 Name (_BBN, 0) 15 16 Name (MCRS, ResourceTemplate() 17 { 18 /* Bus Numbers */ 19 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, 20 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) 21 22 /* IO Region 0 */ 23 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 24 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) 25 26 /* PCI Config Space */ 27 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) 28 29 /* IO Region 1 */ 30 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 31 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) 32 33 /* GPIO Low Memory Region */ 34 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 35 Cacheable, ReadWrite, 36 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000, 37 0x00000010, , , GP00) 38 39 /* PSH Memory Region 0 */ 40 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 41 Cacheable, ReadWrite, 42 0x00000000, 0x04819000, 0x04898fff, 0x00000000, 43 0x00080000, , , PSH0) 44 45 /* PSH Memory Region 1 */ 46 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 47 Cacheable, ReadWrite, 48 0x00000000, 0x04919000, 0x04920fff, 0x00000000, 49 0x00008000, , , PSH1) 50 51 /* SST Memory Region */ 52 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 53 Cacheable, ReadWrite, 54 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000, 55 0x00200000, , , SST0) 56 57 /* PCI Memory Region */ 58 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 59 Cacheable, ReadWrite, 60 0x00000000, 0x80000000, 0xffffffff, 0x00000000, 61 0x80000000, , , PMEM) 62 }) 63 64 Method (_CRS, 0, Serialized) 65 { 66 Return (MCRS) 67 } 68 69 Method (_OSC, 4) 70 { 71 /* Check for proper GUID */ 72 If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) { 73 /* Let OS control everything */ 74 Return (Arg3) 75 } Else { 76 /* Unrecognized UUID */ 77 CreateDWordField(Arg3, 0, CDW1) 78 Or(CDW1, 4, CDW1) 79 Return (Arg3) 80 } 81 } 82 83 Device (SDHC) 84 { 85 Name (_ADR, 0x00010003) 86 Name (_DEP, Package (0x01) 87 { 88 GPIO 89 }) 90 Name (PSTS, Zero) 91 92 Method (_STA) 93 { 94 Return (STA_VISIBLE) 95 } 96 97 Method (_PS3, 0, NotSerialized) 98 { 99 } 100 101 Method (_PS0, 0, NotSerialized) 102 { 103 If (PSTS == Zero) 104 { 105 If (^^GPIO.AVBL == One) 106 { 107 ^^GPIO.WFD3 = One 108 PSTS = One 109 } 110 } 111 } 112 113 /* BCM43340 */ 114 Device (BRC1) 115 { 116 Name (_ADR, 0x01) 117 Name (_DEP, Package (0x01) 118 { 119 GPIO 120 }) 121 122 Method (_STA) 123 { 124 Return (STA_VISIBLE) 125 } 126 127 Method (_RMV, 0, NotSerialized) 128 { 129 Return (Zero) 130 } 131 132 Method (_PS3, 0, NotSerialized) 133 { 134 If (^^^GPIO.AVBL == One) 135 { 136 ^^^GPIO.WFD3 = Zero 137 PSTS = Zero 138 } 139 } 140 141 Method (_PS0, 0, NotSerialized) 142 { 143 If (PSTS == Zero) 144 { 145 If (^^^GPIO.AVBL == One) 146 { 147 ^^^GPIO.WFD3 = One 148 PSTS = One 149 } 150 } 151 } 152 } 153 154 Device (BRC2) 155 { 156 Name (_ADR, 0x02) 157 Method (_STA, 0, NotSerialized) 158 { 159 Return (STA_VISIBLE) 160 } 161 162 Method (_RMV, 0, NotSerialized) 163 { 164 Return (Zero) 165 } 166 } 167 } 168 169 Device (SPI5) 170 { 171 Name (_ADR, 0x00070001) 172 Name (RBUF, ResourceTemplate() 173 { 174 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 175 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 110 } 176 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 177 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 111 } 178 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 179 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } 180 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 181 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } 182 183 FixedDMA(0x000d, 0x0002, Width32bit, ) 184 FixedDMA(0x000c, 0x0003, Width32bit, ) 185 }) 186 187 Method (_CRS, 0, NotSerialized) 188 { 189 Return (RBUF) 190 } 191 192 /* 193 * See 194 * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt 195 * for more information about GPIO bindings. 196 */ 197 Name (_DSD, Package () { 198 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 199 Package () { 200 Package () { 201 "cs-gpios", Package () { 202 ^SPI5, 0, 0, 0, 203 ^SPI5, 1, 0, 0, 204 ^SPI5, 2, 0, 0, 205 ^SPI5, 3, 0, 0, 206 }, 207 }, 208 } 209 }) 210 211 Method (_STA, 0, NotSerialized) 212 { 213 Return (STA_VISIBLE) 214 } 215 } 216 217 Device (I2C1) 218 { 219 Name (_ADR, 0x00080000) 220 221 Method (_STA, 0, NotSerialized) 222 { 223 Return (STA_VISIBLE) 224 } 225 226 Name (RBUF, ResourceTemplate() 227 { 228 FixedDMA(0x0009, 0x0000, Width32bit, ) 229 FixedDMA(0x0008, 0x0001, Width32bit, ) 230 }) 231 232 Method (_CRS, 0, NotSerialized) 233 { 234 Return (RBUF) 235 } 236 } 237 238 Device (I2C6) 239 { 240 Name (_ADR, 0x00090001) 241 242 Method (_STA, 0, NotSerialized) 243 { 244 Return (STA_VISIBLE) 245 } 246 } 247 248 Device (GPIO) 249 { 250 Name (_ADR, 0x000c0000) 251 252 Method (_STA) 253 { 254 Return (STA_VISIBLE) 255 } 256 257 Name (AVBL, Zero) 258 Method (_REG, 2, NotSerialized) 259 { 260 If (Arg0 == 0x08) 261 { 262 AVBL = Arg1 263 } 264 } 265 266 OperationRegion (GPOP, GeneralPurposeIo, 0, 1) 267 Field (GPOP, ByteAcc, NoLock, Preserve) 268 { 269 Connection ( 270 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 271 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 96 } 272 ), 273 WFD3, 1, 274 } 275 } 276 277 Device (PWM0) 278 { 279 Name (_ADR, 0x00170000) 280 281 Method (_STA, 0, NotSerialized) 282 { 283 Return (STA_VISIBLE) 284 } 285 } 286 287 Device (HSU0) 288 { 289 Name (_ADR, 0x00040001) 290 291 Method (_STA, 0, NotSerialized) 292 { 293 Return (STA_VISIBLE) 294 } 295 296 Device (BTH0) 297 { 298 Name (_HID, "BCM2E95") 299 Name (_DEP, Package () 300 { 301 GPIO, 302 HSU0 303 }) 304 305 Method (_STA, 0, NotSerialized) 306 { 307 Return (STA_VISIBLE) 308 } 309 310 Method (_CRS, 0, Serialized) 311 { 312 Name (RBUF, ResourceTemplate() 313 { 314 UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne, 315 0xFC, LittleEndian, ParityTypeNone, FlowControlHardware, 316 0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , ) 317 GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, 318 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 } 319 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 320 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 } 321 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 322 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 } 323 }) 324 Return (RBUF) 325 } 326 327 Name (_DSD, Package () { 328 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 329 Package () { 330 Package () { "host-wakeup-gpios", Package () { ^BTH0, 0, 0, 0 } }, 331 Package () { "device-wakeup-gpios", Package () { ^BTH0, 1, 0, 0 } }, 332 Package () { "shutdown-gpios", Package () { ^BTH0, 2, 0, 0 } }, 333 } 334 }) 335 } 336 } 337 338 Device (IPC1) 339 { 340 Name (_ADR, 0x00130000) 341 342 Method (_STA, 0, NotSerialized) 343 { 344 Return (STA_VISIBLE) 345 } 346 347 Device (PMIC) 348 { 349 Name (_ADR, Zero) 350 Name (_HID, "INTC100E") 351 Name (_CID, "INTC100E") 352 Name (_DDN, "Basin Cove PMIC") 353 Name (_DEP, Package () 354 { 355 IPC1 356 }) 357 358 Method (_STA, 0, NotSerialized) 359 { 360 Return (STA_VISIBLE) 361 } 362 363 Method (_CRS, 0, Serialized) 364 { 365 Name (RBUF, ResourceTemplate() 366 { 367 /* 368 * Shadow registers in SRAM for PMIC: 369 * SRAM PMIC register 370 * -------------------- 371 * 0x00- Unknown 372 * 0x03 THRMIRQ (0x04) 373 * 0x04 BCUIRQ (0x05) 374 * 0x05 ADCIRQ (0x06) 375 * 0x06 CHGRIRQ0 (0x07) 376 * 0x07 CHGRIRQ1 (0x08) 377 * 0x08- Unknown 378 * 0x0a PBSTATUS (0x27) 379 * 0x0b- Unknown 380 */ 381 Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010) 382 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 } 383 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 } 384 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 } 385 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 } 386 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 } 387 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 } 388 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 } 389 }) 390 Return (RBUF) 391 } 392 393 OperationRegion (PMOP, 0x8D, Zero, 0x0100) 394 Field (PMOP, DWordAcc, NoLock, Preserve) 395 { 396 SEL1, 32, 397 SEL2, 32, 398 VCCL, 32, 399 VNNL, 32, 400 AONL, 32, 401 CNTC, 32, 402 CNTN, 32, 403 AONN, 32, 404 CNT1, 32, 405 CNT2, 32, 406 CNT3, 32, 407 FLEX, 32, 408 PRG1, 32, 409 PRG2, 32, 410 PRG3, 32, 411 VLDO, 32, 412 } 413 414 Name (AVBL, Zero) 415 Method (_REG, 2, NotSerialized) 416 { 417 If ((Arg0 == 0x8D)) 418 { 419 AVBL = Arg1 420 } 421 } 422 } 423 } 424} 425 426Device (FLIS) 427{ 428 Name (_HID, "INTC1002") 429 Name (_DDN, "Intel Merrifield Family-Level Interface Shim") 430 Name (RBUF, ResourceTemplate() 431 { 432 Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000) 433 PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 } 434 PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 } 435 PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 } 436 PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 } 437 PinGroup("pwm0", ResourceProducer, ) { 144 } 438 PinGroup("pwm1", ResourceProducer, ) { 145 } 439 PinGroup("pwm2", ResourceProducer, ) { 132 } 440 PinGroup("pwm3", ResourceProducer, ) { 133 } 441 }) 442 443 Method (_CRS, 0, NotSerialized) 444 { 445 Return (RBUF) 446 } 447 448 Method (_STA, 0, NotSerialized) 449 { 450 Return (STA_VISIBLE) 451 } 452} 453