1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2017 Intel Corporation 4 * 5 * Partially based on southcluster.asl for other x86 platforms 6 */ 7 8Device (PCI0) 9{ 10 Name (_HID, EISAID("PNP0A08")) /* PCIe */ 11 Name (_CID, EISAID("PNP0A03")) /* PCI */ 12 13 Name (_ADR, 0) 14 Name (_BBN, 0) 15 16 Name (MCRS, ResourceTemplate() 17 { 18 /* Bus Numbers */ 19 WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, 20 0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00) 21 22 /* IO Region 0 */ 23 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 24 0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00) 25 26 /* PCI Config Space */ 27 IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008) 28 29 /* IO Region 1 */ 30 WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 31 0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01) 32 33 /* GPIO Low Memory Region */ 34 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 35 Cacheable, ReadWrite, 36 0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000, 37 0x00000010, , , GP00) 38 39 /* PSH Memory Region 0 */ 40 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 41 Cacheable, ReadWrite, 42 0x00000000, 0x04819000, 0x04898fff, 0x00000000, 43 0x00080000, , , PSH0) 44 45 /* PSH Memory Region 1 */ 46 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 47 Cacheable, ReadWrite, 48 0x00000000, 0x04919000, 0x04920fff, 0x00000000, 49 0x00008000, , , PSH1) 50 51 /* SST Memory Region */ 52 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 53 Cacheable, ReadWrite, 54 0x00000000, 0x05e00000, 0x05ffffff, 0x00000000, 55 0x00200000, , , SST0) 56 57 /* PCI Memory Region */ 58 DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, 59 Cacheable, ReadWrite, 60 0x00000000, 0x80000000, 0xffffffff, 0x00000000, 61 0x80000000, , , PMEM) 62 }) 63 64 Method (_CRS, 0, Serialized) 65 { 66 Return (MCRS) 67 } 68 69 Method (_OSC, 4) 70 { 71 /* Check for proper GUID */ 72 If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) { 73 /* Let OS control everything */ 74 Return (Arg3) 75 } Else { 76 /* Unrecognized UUID */ 77 CreateDWordField(Arg3, 0, CDW1) 78 Or(CDW1, 4, CDW1) 79 Return (Arg3) 80 } 81 } 82 83 Device (SDHC) 84 { 85 Name (_ADR, 0x00010003) 86 Name (_DEP, Package (0x01) 87 { 88 GPIO 89 }) 90 Name (PSTS, Zero) 91 92 Method (_STA) 93 { 94 Return (STA_VISIBLE) 95 } 96 97 Method (_PS3, 0, NotSerialized) 98 { 99 } 100 101 Method (_PS0, 0, NotSerialized) 102 { 103 If (PSTS == Zero) 104 { 105 If (^^GPIO.AVBL == One) 106 { 107 ^^GPIO.WFD3 = One 108 PSTS = One 109 } 110 } 111 } 112 113 /* BCM43340 */ 114 Device (BRC1) 115 { 116 Name (_ADR, 0x01) 117 Name (_DEP, Package (0x01) 118 { 119 GPIO 120 }) 121 122 Method (_STA) 123 { 124 Return (STA_VISIBLE) 125 } 126 127 Method (_RMV, 0, NotSerialized) 128 { 129 Return (Zero) 130 } 131 132 Method (_PS3, 0, NotSerialized) 133 { 134 If (^^^GPIO.AVBL == One) 135 { 136 ^^^GPIO.WFD3 = Zero 137 PSTS = Zero 138 } 139 } 140 141 Method (_PS0, 0, NotSerialized) 142 { 143 If (PSTS == Zero) 144 { 145 If (^^^GPIO.AVBL == One) 146 { 147 ^^^GPIO.WFD3 = One 148 PSTS = One 149 } 150 } 151 } 152 } 153 154 Device (BRC2) 155 { 156 Name (_ADR, 0x02) 157 Method (_STA, 0, NotSerialized) 158 { 159 Return (STA_VISIBLE) 160 } 161 162 Method (_RMV, 0, NotSerialized) 163 { 164 Return (Zero) 165 } 166 } 167 } 168 169 Device (SPI5) 170 { 171 Name (_ADR, 0x00070001) 172 Name (RBUF, ResourceTemplate() 173 { 174 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 175 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 110 } 176 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 177 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 111 } 178 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 179 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } 180 GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, 181 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } 182 }) 183 184 Method (_CRS, 0, NotSerialized) 185 { 186 Return (RBUF) 187 } 188 189 /* 190 * See 191 * http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt 192 * for more information about GPIO bindings. 193 */ 194 Name (_DSD, Package () { 195 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 196 Package () { 197 Package () { 198 "cs-gpios", Package () { 199 ^SPI5, 0, 0, 0, 200 ^SPI5, 1, 0, 0, 201 ^SPI5, 2, 0, 0, 202 ^SPI5, 3, 0, 0, 203 }, 204 }, 205 } 206 }) 207 208 Method (_STA, 0, NotSerialized) 209 { 210 Return (STA_VISIBLE) 211 } 212 } 213 214 Device (I2C1) 215 { 216 Name (_ADR, 0x00080000) 217 218 Method (_STA, 0, NotSerialized) 219 { 220 Return (STA_VISIBLE) 221 } 222 } 223 224 Device (I2C6) 225 { 226 Name (_ADR, 0x00090001) 227 228 Method (_STA, 0, NotSerialized) 229 { 230 Return (STA_VISIBLE) 231 } 232 } 233 234 Device (GPIO) 235 { 236 Name (_ADR, 0x000c0000) 237 238 Method (_STA) 239 { 240 Return (STA_VISIBLE) 241 } 242 243 Name (AVBL, Zero) 244 Method (_REG, 2, NotSerialized) 245 { 246 If (Arg0 == 0x08) 247 { 248 AVBL = Arg1 249 } 250 } 251 252 OperationRegion (GPOP, GeneralPurposeIo, 0, 1) 253 Field (GPOP, ByteAcc, NoLock, Preserve) 254 { 255 Connection ( 256 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 257 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 96 } 258 ), 259 WFD3, 1, 260 } 261 } 262 263 Device (PWM0) 264 { 265 Name (_ADR, 0x00170000) 266 267 Method (_STA, 0, NotSerialized) 268 { 269 Return (STA_VISIBLE) 270 } 271 } 272 273 Device (HSU0) 274 { 275 Name (_ADR, 0x00040001) 276 277 Method (_STA, 0, NotSerialized) 278 { 279 Return (STA_VISIBLE) 280 } 281 282 Device (BTH0) 283 { 284 Name (_HID, "BCM2E95") 285 Name (_DEP, Package () 286 { 287 GPIO, 288 HSU0 289 }) 290 291 Method (_STA, 0, NotSerialized) 292 { 293 Return (STA_VISIBLE) 294 } 295 296 Method (_CRS, 0, Serialized) 297 { 298 Name (RBUF, ResourceTemplate() 299 { 300 UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne, 301 0xFC, LittleEndian, ParityTypeNone, FlowControlHardware, 302 0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , ) 303 GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, 304 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 } 305 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 306 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 } 307 GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, 308 "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 } 309 }) 310 Return (RBUF) 311 } 312 313 Name (_DSD, Package () { 314 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 315 Package () { 316 Package () { "host-wakeup-gpios", Package () { ^BTH0, 0, 0, 0 } }, 317 Package () { "device-wakeup-gpios", Package () { ^BTH0, 1, 0, 0 } }, 318 Package () { "shutdown-gpios", Package () { ^BTH0, 2, 0, 0 } }, 319 } 320 }) 321 } 322 } 323 324 Device (IPC1) 325 { 326 Name (_ADR, 0x00130000) 327 328 Method (_STA, 0, NotSerialized) 329 { 330 Return (STA_VISIBLE) 331 } 332 333 Device (PMIC) 334 { 335 Name (_ADR, Zero) 336 Name (_HID, "INTC100E") 337 Name (_CID, "INTC100E") 338 Name (_DDN, "Basin Cove PMIC") 339 Name (_DEP, Package () 340 { 341 IPC1 342 }) 343 344 Method (_STA, 0, NotSerialized) 345 { 346 Return (STA_VISIBLE) 347 } 348 349 Method (_CRS, 0, Serialized) 350 { 351 Name (RBUF, ResourceTemplate() 352 { 353 /* 354 * Shadow registers in SRAM for PMIC: 355 * SRAM PMIC register 356 * -------------------- 357 * 0x00- Unknown 358 * 0x03 THRMIRQ (0x04) 359 * 0x04 BCUIRQ (0x05) 360 * 0x05 ADCIRQ (0x06) 361 * 0x06 CHGRIRQ0 (0x07) 362 * 0x07 CHGRIRQ1 (0x08) 363 * 0x08- Unknown 364 * 0x0a PBSTATUS (0x27) 365 * 0x0b- Unknown 366 */ 367 Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010) 368 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 } 369 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 } 370 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 } 371 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 } 372 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 } 373 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 } 374 Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 } 375 }) 376 Return (RBUF) 377 } 378 379 OperationRegion (PMOP, 0x8D, Zero, 0x0100) 380 Field (PMOP, DWordAcc, NoLock, Preserve) 381 { 382 SEL1, 32, 383 SEL2, 32, 384 VCCL, 32, 385 VNNL, 32, 386 AONL, 32, 387 CNTC, 32, 388 CNTN, 32, 389 AONN, 32, 390 CNT1, 32, 391 CNT2, 32, 392 CNT3, 32, 393 FLEX, 32, 394 PRG1, 32, 395 PRG2, 32, 396 PRG3, 32, 397 VLDO, 32, 398 } 399 400 Name (AVBL, Zero) 401 Method (_REG, 2, NotSerialized) 402 { 403 If ((Arg0 == 0x8D)) 404 { 405 AVBL = Arg1 406 } 407 } 408 } 409 } 410} 411 412Device (FLIS) 413{ 414 Name (_HID, "INTC1002") 415 Name (_DDN, "Intel Merrifield Family-Level Interface Shim") 416 Name (RBUF, ResourceTemplate() 417 { 418 Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000) 419 PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 } 420 PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 } 421 PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 } 422 PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 } 423 PinGroup("pwm0", ResourceProducer, ) { 144 } 424 PinGroup("pwm1", ResourceProducer, ) { 145 } 425 PinGroup("pwm2", ResourceProducer, ) { 132 } 426 PinGroup("pwm3", ResourceProducer, ) { 133 } 427 }) 428 429 Method (_CRS, 0, NotSerialized) 430 { 431 Return (RBUF) 432 } 433 434 Method (_STA, 0, NotSerialized) 435 { 436 Return (STA_VISIBLE) 437 } 438} 439