1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * From coreboot soc/intel/broadwell/include/soc/lpc.h 4 * 5 * Copyright (C) 2016 Google Inc. 6 */ 7 8 #ifndef _ASM_ARCH_LPC_H 9 #define _ASM_ARCH_LPC_H 10 11 #define GEN_PMCON_1 0xa0 12 #define SMI_LOCK (1 << 4) 13 #define GEN_PMCON_2 0xa2 14 #define SYSTEM_RESET_STS (1 << 4) 15 #define THERMTRIP_STS (1 << 3) 16 #define SYSPWR_FLR (1 << 1) 17 #define PWROK_FLR (1 << 0) 18 #define GEN_PMCON_3 0xa4 19 #define SUS_PWR_FLR (1 << 14) 20 #define GEN_RST_STS (1 << 9) 21 #define RTC_BATTERY_DEAD (1 << 2) 22 #define PWR_FLR (1 << 1) 23 #define SLEEP_AFTER_POWER_FAIL (1 << 0) 24 #define GEN_PMCON_LOCK 0xa6 25 #define SLP_STR_POL_LOCK (1 << 2) 26 #define ACPI_BASE_LOCK (1 << 1) 27 #define PMIR 0xac 28 #define PMIR_CF9LOCK (1 << 31) 29 #define PMIR_CF9GR (1 << 20) 30 31 #endif 32