1 /* 2 * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __FSP_CONFIGS_H__ 8 #define __FSP_CONFIGS_H__ 9 10 #ifndef __ASSEMBLY__ 11 struct fsp_config_data { 12 struct fsp_cfg_common common; 13 struct upd_region fsp_upd; 14 }; 15 16 struct fspinit_rtbuf { 17 struct common_buf common; /* FSP common runtime data structure */ 18 }; 19 #endif 20 21 /* FSP user configuration settings */ 22 23 #define MRC_INIT_TSEG_SIZE_1MB 1 24 #define MRC_INIT_TSEG_SIZE_2MB 2 25 #define MRC_INIT_TSEG_SIZE_4MB 4 26 #define MRC_INIT_TSEG_SIZE_8MB 8 27 28 #define MRC_INIT_MMIO_SIZE_1024MB 0x400 29 #define MRC_INIT_MMIO_SIZE_1536MB 0x600 30 #define MRC_INIT_MMIO_SIZE_2048MB 0x800 31 32 #define IGD_DVMT50_PRE_ALLOC_32MB 0x01 33 #define IGD_DVMT50_PRE_ALLOC_64MB 0x02 34 #define IGD_DVMT50_PRE_ALLOC_96MB 0x03 35 #define IGD_DVMT50_PRE_ALLOC_128MB 0x04 36 #define IGD_DVMT50_PRE_ALLOC_160MB 0x05 37 #define IGD_DVMT50_PRE_ALLOC_192MB 0x06 38 #define IGD_DVMT50_PRE_ALLOC_224MB 0x07 39 #define IGD_DVMT50_PRE_ALLOC_256MB 0x08 40 #define IGD_DVMT50_PRE_ALLOC_288MB 0x09 41 #define IGD_DVMT50_PRE_ALLOC_320MB 0x0a 42 #define IGD_DVMT50_PRE_ALLOC_352MB 0x0b 43 #define IGD_DVMT50_PRE_ALLOC_384MB 0x0c 44 #define IGD_DVMT50_PRE_ALLOC_416MB 0x0d 45 #define IGD_DVMT50_PRE_ALLOC_448MB 0x0e 46 #define IGD_DVMT50_PRE_ALLOC_480MB 0x0f 47 #define IGD_DVMT50_PRE_ALLOC_512MB 0x10 48 49 #define APERTURE_SIZE_128MB 1 50 #define APERTURE_SIZE_256MB 2 51 #define APERTURE_SIZE_512MB 3 52 53 #define GTT_SIZE_1MB 1 54 #define GTT_SIZE_2MB 2 55 56 #define DRAM_TYPE_DDR3 0 57 #define DRAM_TYPE_LPDDR3 1 58 59 #define SDCARD_MODE_DISABLED 0 60 #define SDCARD_MODE_PCI 1 61 #define SDCARD_MODE_ACPI 2 62 63 #define LPE_MODE_DISABLED 0 64 #define LPE_MODE_PCI 1 65 #define LPE_MODE_ACPI 2 66 67 #define CHV_SVID_CONFIG_0 0 68 #define CHV_SVID_CONFIG_1 1 69 #define CHV_SVID_CONFIG_2 2 70 #define CHV_SVID_CONFIG_3 3 71 72 #define EMMC_MODE_DISABLED 0 73 #define EMMC_MODE_PCI 1 74 #define EMMC_MODE_ACPI 2 75 76 #define SATA_SPEED_GEN1 1 77 #define SATA_SPEED_GEN2 2 78 #define SATA_SPEED_GEN3 3 79 80 #define ISP_PCI_DEV_CONFIG_1 1 81 #define ISP_PCI_DEV_CONFIG_2 2 82 #define ISP_PCI_DEV_CONFIG_3 3 83 84 #define PNP_SETTING_DISABLED 0 85 #define PNP_SETTING_POWER 1 86 #define PNP_SETTING_PERF 2 87 #define PNP_SETTING_POWER_AND_PERF 3 88 89 #endif /* __FSP_CONFIGS_H__ */ 90