1/*
2 * Copyright (C) 2007-2009 coresystems GmbH
3 * Copyright (C) 2013 Google Inc.
4 * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
5 *
6 * Modified from coreboot src/soc/intel/baytrail/acpi/lpc.asl
7 *
8 * SPDX-License-Identifier:	GPL-2.0+
9 */
10
11/* Intel LPC Bus Device - 0:1f.0 */
12
13Scope (\)
14{
15	/* Intel Legacy Block */
16	OperationRegion(ILBS, SystemMemory, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
17	Field(ILBS, AnyAcc, NoLock, Preserve) {
18		Offset (0x8),
19		PRTA, 8,
20		PRTB, 8,
21		PRTC, 8,
22		PRTD, 8,
23		PRTE, 8,
24		PRTF, 8,
25		PRTG, 8,
26		PRTH, 8,
27		Offset (0x88),
28		    , 3,
29		UI3E, 1,
30		UI4E, 1
31	}
32}
33
34Device (LPCB)
35{
36	Name(_ADR, 0x001f0000)
37
38	OperationRegion(LPC0, PCI_Config, 0x00, 0x100)
39	Field(LPC0, AnyAcc, NoLock, Preserve) {
40		Offset(0x08),
41		SRID, 8,
42		Offset(0x80),
43		C1EN, 1,
44		Offset(0x84)
45	}
46
47	#include <asm/acpi/irqlinks.asl>
48
49	/* Firmware Hub */
50	Device (FWH)
51	{
52		Name(_HID, EISAID("INT0800"))
53		Name(_CRS, ResourceTemplate()
54		{
55			Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
56		})
57	}
58
59	/* 8259 Interrupt Controller */
60	Device (PIC)
61	{
62		Name(_HID, EISAID("PNP0000"))
63		Name(_CRS, ResourceTemplate()
64		{
65			IO(Decode16, 0x20, 0x20, 0x01, 0x02)
66			IO(Decode16, 0x24, 0x24, 0x01, 0x02)
67			IO(Decode16, 0x28, 0x28, 0x01, 0x02)
68			IO(Decode16, 0x2c, 0x2c, 0x01, 0x02)
69			IO(Decode16, 0x30, 0x30, 0x01, 0x02)
70			IO(Decode16, 0x34, 0x34, 0x01, 0x02)
71			IO(Decode16, 0x38, 0x38, 0x01, 0x02)
72			IO(Decode16, 0x3c, 0x3c, 0x01, 0x02)
73			IO(Decode16, 0xa0, 0xa0, 0x01, 0x02)
74			IO(Decode16, 0xa4, 0xa4, 0x01, 0x02)
75			IO(Decode16, 0xa8, 0xa8, 0x01, 0x02)
76			IO(Decode16, 0xac, 0xac, 0x01, 0x02)
77			IO(Decode16, 0xb0, 0xb0, 0x01, 0x02)
78			IO(Decode16, 0xb4, 0xb4, 0x01, 0x02)
79			IO(Decode16, 0xb8, 0xb8, 0x01, 0x02)
80			IO(Decode16, 0xbc, 0xbc, 0x01, 0x02)
81			IO(Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
82			IRQNoFlags () { 2 }
83		})
84	}
85
86	/* 8254 timer */
87	Device (TIMR)
88	{
89		Name(_HID, EISAID("PNP0100"))
90		Name(_CRS, ResourceTemplate()
91		{
92			IO(Decode16, 0x40, 0x40, 0x01, 0x04)
93			IO(Decode16, 0x50, 0x50, 0x10, 0x04)
94			IRQNoFlags() { 0 }
95		})
96	}
97
98	/* HPET */
99	Device (HPET)
100	{
101		Name(_HID, EISAID("PNP0103"))
102		Name(_CID, 0x010CD041)
103		Name(_CRS, ResourceTemplate()
104		{
105			Memory32Fixed(ReadOnly, HPET_BASE_ADDRESS, HPET_BASE_SIZE)
106		})
107
108		Method(_STA)
109		{
110			Return (STA_VISIBLE)
111		}
112	}
113
114	/* Internal UART */
115	Device (IURT)
116	{
117		Name(_HID, EISAID("PNP0501"))
118		Name(_UID, 1)
119
120		Method(_STA, 0, Serialized)
121		{
122			/*
123			 * TODO:
124			 *
125			 * Need to hide the internal UART depending on whether
126			 * internal UART is enabled or not so that external
127			 * SuperIO UART can be exposed to system.
128			 */
129			Store(1, UI3E)
130			Store(1, UI4E)
131			Store(1, C1EN)
132			Return (STA_VISIBLE)
133
134		}
135
136		Method(_DIS, 0, Serialized)
137		{
138			Store(0, UI3E)
139			Store(0, UI4E)
140			Store(0, C1EN)
141		}
142
143		Method(_CRS, 0, Serialized)
144		{
145			Name(BUF0, ResourceTemplate()
146			{
147				IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
148				IRQNoFlags() { 3 }
149			})
150
151			Name(BUF1, ResourceTemplate()
152			{
153				IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
154				IRQNoFlags() { 4 }
155			})
156
157			If (LLessEqual(SRID, 0x04)) {
158				Return (BUF0)
159			} Else {
160				Return (BUF1)
161			}
162		}
163	}
164
165	/* Real Time Clock */
166	Device (RTC)
167	{
168		Name(_HID, EISAID("PNP0B00"))
169		Name(_CRS, ResourceTemplate()
170		{
171			IO(Decode16, 0x70, 0x70, 1, 8)
172			/*
173			 * Disable as Windows doesn't like it, and systems
174			 * don't seem to use it
175			 */
176			/* IRQNoFlags() { 8 } */
177		})
178	}
179
180	/* LPC device: Resource consumption */
181	Device (LDRC)
182	{
183		Name(_HID, EISAID("PNP0C02"))
184		Name(_UID, 2)
185
186		Name(RBUF, ResourceTemplate()
187		{
188			IO(Decode16, 0x61, 0x61, 0x1, 0x01) /* NMI Status */
189			IO(Decode16, 0x63, 0x63, 0x1, 0x01) /* CPU Reserved */
190			IO(Decode16, 0x65, 0x65, 0x1, 0x01) /* CPU Reserved */
191			IO(Decode16, 0x67, 0x67, 0x1, 0x01) /* CPU Reserved */
192			IO(Decode16, 0x80, 0x80, 0x1, 0x01) /* Port 80 Post */
193			IO(Decode16, 0x92, 0x92, 0x1, 0x01) /* CPU Reserved */
194			IO(Decode16, 0xb2, 0xb2, 0x1, 0x02) /* SWSMI */
195		})
196
197		Method(_CRS, 0, NotSerialized)
198		{
199			Return (RBUF)
200		}
201	}
202}
203