xref: /openbmc/u-boot/arch/x86/include/asm/acpi_table.h (revision ee7bb5be)
1 /*
2  * Based on acpi.c from coreboot
3  *
4  * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
5  *
6  * SPDX-License-Identifier: GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <malloc.h>
11 #include <asm/post.h>
12 #include <linux/string.h>
13 
14 #define RSDP_SIG		"RSD PTR "	/* RSDT pointer signature */
15 #define ACPI_TABLE_CREATOR	"UBOOT   "	/* Must be 8 bytes long! */
16 #define OEM_ID			"UBOOT "	/* Must be 6 bytes long! */
17 #define ASLC			"INTL"		/* Must be 4 bytes long! */
18 
19 #define OEM_REVISION	42
20 #define ASL_COMPILER_REVISION	42
21 
22 /* IO ports to generate SMIs */
23 #define APM_CNT			0xb2
24 #define APM_CNT_CST_CONTROL	0x85
25 #define APM_CNT_PST_CONTROL	0x80
26 #define APM_CNT_ACPI_DISABLE	0x1e
27 #define APM_CNT_ACPI_ENABLE	0xe1
28 #define APM_CNT_MBI_UPDATE	0xeb
29 #define APM_CNT_GNVS_UPDATE	0xea
30 #define APM_CNT_FINALIZE	0xcb
31 #define APM_CNT_LEGACY		0xcc
32 #define APM_ST			0xb3
33 
34 /* Multiple Processor Interrupts */
35 #define MP_IRQ_POLARITY_DEFAULT	0x0
36 #define MP_IRQ_POLARITY_HIGH	0x1
37 #define MP_IRQ_POLARITY_LOW	0x3
38 #define MP_IRQ_POLARITY_MASK	0x3
39 #define MP_IRQ_TRIGGER_DEFAULT	0x0
40 #define MP_IRQ_TRIGGER_EDGE	0x4
41 #define MP_IRQ_TRIGGER_LEVEL	0xc
42 #define MP_IRQ_TRIGGER_MASK	0xc
43 
44 /*
45  * Interrupt assigned for SCI in order to
46  * create the ACPI MADT IRQ override entry
47  */
48 #define ACTL		0x00
49 #define SCIS_MASK	0x07
50 #define SCIS_IRQ9	0x00
51 #define SCIS_IRQ10	0x01
52 #define SCIS_IRQ11	0x02
53 #define SCIS_IRQ20	0x04
54 #define SCIS_IRQ21	0x05
55 #define SCIS_IRQ22	0x06
56 #define SCIS_IRQ23	0x07
57 
58 #define ACPI_REV_ACPI_1_0	1
59 #define ACPI_REV_ACPI_2_0	1
60 #define ACPI_REV_ACPI_3_0	2
61 #define ACPI_REV_ACPI_4_0	3
62 #define ACPI_REV_ACPI_5_0	5
63 
64 #define ACPI_RSDP_REV_ACPI_1_0	0
65 #define ACPI_RSDP_REV_ACPI_2_0	2
66 
67 typedef struct acpi_gen_regaddr {
68 	u8  space_id;	/* Address space ID */
69 	u8  bit_width;	/* Register size in bits */
70 	u8  bit_offset;	/* Register bit offset */
71 	union {
72 		/* Reserved in ACPI 2.0 - 2.0b */
73 		u8  resv;
74 		/* Access size in ACPI 2.0c/3.0/4.0/5.0 */
75 		u8  access_size;
76 	};
77 	u32 addrl;	/* Register address, low 32 bits */
78 	u32 addrh;	/* Register address, high 32 bits */
79 } acpi_addr_t;
80 
81 
82 /*
83  * RSDP (Root System Description Pointer)
84  * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
85  */
86 struct acpi_rsdp {
87 	char signature[8];	/* RSDP signature */
88 	u8 checksum;		/* Checksum of the first 20 bytes */
89 	char oem_id[6];		/* OEM ID */
90 	u8 revision;		/* 0 for ACPI 1.0, 2 for ACPI 2.0/3.0/4.0 */
91 	u32 rsdt_address;	/* Physical address of RSDT (32 bits) */
92 	u32 length;		/* Total RSDP length (incl. extended part) */
93 	u64 xsdt_address;	/* Physical address of XSDT (64 bits) */
94 	u8 ext_checksum;	/* Checksum of the whole table */
95 	u8 reserved[3];
96 };
97 
98 enum acpi_address_space_type {
99 	ACPI_ADDRESS_SPACE_MEMORY = 0,	/* System memory */
100 	ACPI_ADDRESS_SPACE_IO,		/* System I/O */
101 	ACPI_ADDRESS_SPACE_PCI,		/* PCI config space */
102 	ACPI_ADDRESS_SPACE_EC,		/* Embedded controller */
103 	ACPI_ADDRESS_SPACE_SMBUS,	/* SMBus */
104 	ACPI_ADDRESS_SPACE_PCC = 0x0a,	/* Platform Comm. Channel */
105 	ACPI_ADDRESS_SPACE_FIXED = 0x7f	/* Functional fixed hardware */
106 };
107 
108 /* functional fixed hardware */
109 #define ACPI_FFIXEDHW_VENDOR_INTEL	1	/* Intel */
110 #define ACPI_FFIXEDHW_CLASS_HLT		0	/* C1 Halt */
111 #define ACPI_FFIXEDHW_CLASS_IO_HLT	1	/* C1 I/O then Halt */
112 #define ACPI_FFIXEDHW_CLASS_MWAIT	2	/* MWAIT Native C-state */
113 #define ACPI_FFIXEDHW_FLAG_HW_COORD	1	/* Hardware Coordination bit */
114 #define ACPI_FFIXEDHW_FLAG_BM_STS	2	/* BM_STS avoidance bit */
115 
116 /* Access size definitions for Generic address structure */
117 enum acpi_address_space_size {
118 	ACPI_ACCESS_SIZE_UNDEFINED = 0,	/* Undefined (legacy reasons) */
119 	ACPI_ACCESS_SIZE_BYTE_ACCESS = 1,
120 	ACPI_ACCESS_SIZE_WORD_ACCESS = 2,
121 	ACPI_ACCESS_SIZE_DWORD_ACCESS = 3,
122 	ACPI_ACCESS_SIZE_QWORD_ACCESS = 4
123 };
124 
125 /* Generic ACPI header, provided by (almost) all tables */
126 typedef struct acpi_table_header {
127 	char signature[4];	/* ACPI signature (4 ASCII characters) */
128 	u32 length;		/* Table length in bytes (incl. header) */
129 	u8 revision;		/* Table version (not ACPI version!) */
130 	volatile u8 checksum;	/* To make sum of entire table == 0 */
131 	char oem_id[6];		/* OEM identification */
132 	char oem_table_id[8];	/* OEM table identification */
133 	u32 oem_revision;	/* OEM revision number */
134 	char asl_compiler_id[4]; /* ASL compiler vendor ID */
135 	u32 asl_compiler_revision; /* ASL compiler revision number */
136 } acpi_header_t;
137 
138 /* A maximum number of 32 ACPI tables ought to be enough for now */
139 #define MAX_ACPI_TABLES	32
140 
141 /* RSDT (Root System Description Table) */
142 struct acpi_rsdt {
143 	struct acpi_table_header header;
144 	u32 entry[MAX_ACPI_TABLES];
145 };
146 
147 /* XSDT (Extended System Description Table) */
148 struct acpi_xsdt {
149 	struct acpi_table_header header;
150 	u64 entry[MAX_ACPI_TABLES];
151 };
152 
153 /* MCFG (PCI Express MMIO config space BAR description table) */
154 struct acpi_mcfg {
155 	struct acpi_table_header header;
156 	u8 reserved[8];
157 };
158 
159 struct acpi_mcfg_mmconfig {
160 	u32 base_address;
161 	u32 base_reserved;
162 	u16 pci_segment_group_number;
163 	u8 start_bus_number;
164 	u8 end_bus_number;
165 	u8 reserved[4];
166 };
167 
168 /* MADT (Multiple APIC Description Table) */
169 struct acpi_madt {
170 	struct acpi_table_header header;
171 	u32 lapic_addr;			/* Local APIC address */
172 	u32 flags;			/* Multiple APIC flags */
173 } acpi_madt_t;
174 
175 enum dev_scope_type {
176 	SCOPE_PCI_ENDPOINT = 1,
177 	SCOPE_PCI_SUB = 2,
178 	SCOPE_IOAPIC = 3,
179 	SCOPE_MSI_HPET = 4
180 };
181 
182 typedef struct dev_scope {
183 	u8 type;
184 	u8 length;
185 	u8 reserved[2];
186 	u8 enumeration;
187 	u8 start_bus;
188 	struct {
189 		u8 dev;
190 		u8 fn;
191 	} path[0];
192 } __packed dev_scope_t;
193 
194 /* MADT: APIC Structure Type*/
195 enum acpi_apic_types {
196 	LOCALAPIC	= 0,	/* Processor local APIC */
197 	IOAPIC,			/* I/O APIC */
198 	IRQSOURCEOVERRIDE,	/* Interrupt source override */
199 	NMITYPE,		/* NMI source */
200 	LOCALNMITYPE, 		/* Local APIC NMI */
201 	LAPICADDRESSOVERRIDE,	/* Local APIC address override */
202 	IOSAPIC,		/* I/O SAPIC */
203 	LOCALSAPIC,		/* Local SAPIC */
204 	PLATFORMIRQSOURCES,	/* Platform interrupt sources */
205 	LOCALX2SAPIC,		/* Processor local x2APIC */
206 	LOCALX2APICNMI,		/* Local x2APIC NMI */
207 };
208 
209 /* MADT: Processor Local APIC Structure */
210 struct acpi_madt_lapic {
211 	u8 type;		/* Type (0) */
212 	u8 length;		/* Length in bytes (8) */
213 	u8 processor_id;	/* ACPI processor ID */
214 	u8 apic_id;		/* Local APIC ID */
215 	u32 flags;		/* Local APIC flags */
216 };
217 
218 #define LOCAL_APIC_FLAG_ENABLED	(1 << 0)
219 /* bits 1-31: reserved */
220 #define PCAT_COMPAT		(1 << 0)
221 /* bits 1-31: reserved */
222 
223 /* MADT: Local APIC NMI Structure */
224 struct acpi_madt_lapic_nmi {
225 	u8 type;		/* Type (4) */
226 	u8 length;		/* Length in bytes (6) */
227 	u8 processor_id;	/* ACPI processor ID */
228 	u16 flags;		/* MPS INTI flags */
229 	u8 lint;		/* Local APIC LINT# */
230 };
231 
232 /* MADT: I/O APIC Structure */
233 struct acpi_madt_ioapic {
234 	u8 type;		/* Type (1) */
235 	u8 length;		/* Length in bytes (12) */
236 	u8 ioapic_id;		/* I/O APIC ID */
237 	u8 reserved;
238 	u32 ioapic_addr;	/* I/O APIC address */
239 	u32 gsi_base;		/* Global system interrupt base */
240 };
241 
242 /* MADT: Interrupt Source Override Structure */
243 struct acpi_madt_irqoverride {
244 	u8 type;		/* Type (2) */
245 	u8 length;		/* Length in bytes (10) */
246 	u8 bus;			/* ISA (0) */
247 	u8 source;		/* Bus-relative int. source (IRQ) */
248 	u32 gsirq;		/* Global system interrupt */
249 	u16 flags;		/* MPS INTI flags */
250 };
251 
252 /* FADT (Fixed ACPI Description Table) */
253 struct __packed acpi_fadt {
254 	struct acpi_table_header header;
255 	u32 firmware_ctrl;
256 	u32 dsdt;
257 	u8 model;
258 	u8 preferred_pm_profile;
259 	u16 sci_int;
260 	u32 smi_cmd;
261 	u8 acpi_enable;
262 	u8 acpi_disable;
263 	u8 s4bios_req;
264 	u8 pstate_cnt;
265 	u32 pm1a_evt_blk;
266 	u32 pm1b_evt_blk;
267 	u32 pm1a_cnt_blk;
268 	u32 pm1b_cnt_blk;
269 	u32 pm2_cnt_blk;
270 	u32 pm_tmr_blk;
271 	u32 gpe0_blk;
272 	u32 gpe1_blk;
273 	u8 pm1_evt_len;
274 	u8 pm1_cnt_len;
275 	u8 pm2_cnt_len;
276 	u8 pm_tmr_len;
277 	u8 gpe0_blk_len;
278 	u8 gpe1_blk_len;
279 	u8 gpe1_base;
280 	u8 cst_cnt;
281 	u16 p_lvl2_lat;
282 	u16 p_lvl3_lat;
283 	u16 flush_size;
284 	u16 flush_stride;
285 	u8 duty_offset;
286 	u8 duty_width;
287 	u8 day_alrm;
288 	u8 mon_alrm;
289 	u8 century;
290 	u16 iapc_boot_arch;
291 	u8 res2;
292 	u32 flags;
293 	struct acpi_gen_regaddr reset_reg;
294 	u8 reset_value;
295 	u8 res3;
296 	u8 res4;
297 	u8 res5;
298 	u32 x_firmware_ctl_l;
299 	u32 x_firmware_ctl_h;
300 	u32 x_dsdt_l;
301 	u32 x_dsdt_h;
302 	struct acpi_gen_regaddr x_pm1a_evt_blk;
303 	struct acpi_gen_regaddr x_pm1b_evt_blk;
304 	struct acpi_gen_regaddr x_pm1a_cnt_blk;
305 	struct acpi_gen_regaddr x_pm1b_cnt_blk;
306 	struct acpi_gen_regaddr x_pm2_cnt_blk;
307 	struct acpi_gen_regaddr x_pm_tmr_blk;
308 	struct acpi_gen_regaddr x_gpe0_blk;
309 	struct acpi_gen_regaddr x_gpe1_blk;
310 };
311 
312 /* Flags for p_lvl2_lat and p_lvl3_lat */
313 #define ACPI_FADT_C2_NOT_SUPPORTED	101
314 #define ACPI_FADT_C3_NOT_SUPPORTED	1001
315 
316 /* FADT Feature Flags */
317 #define ACPI_FADT_WBINVD		(1 << 0)
318 #define ACPI_FADT_WBINVD_FLUSH		(1 << 1)
319 #define ACPI_FADT_C1_SUPPORTED		(1 << 2)
320 #define ACPI_FADT_C2_MP_SUPPORTED	(1 << 3)
321 #define ACPI_FADT_POWER_BUTTON		(1 << 4)
322 #define ACPI_FADT_SLEEP_BUTTON		(1 << 5)
323 #define ACPI_FADT_FIXED_RTC		(1 << 6)
324 #define ACPI_FADT_S4_RTC_WAKE		(1 << 7)
325 #define ACPI_FADT_32BIT_TIMER		(1 << 8)
326 #define ACPI_FADT_DOCKING_SUPPORTED	(1 << 9)
327 #define ACPI_FADT_RESET_REGISTER	(1 << 10)
328 #define ACPI_FADT_SEALED_CASE		(1 << 11)
329 #define ACPI_FADT_HEADLESS		(1 << 12)
330 #define ACPI_FADT_SLEEP_TYPE		(1 << 13)
331 #define ACPI_FADT_PCI_EXPRESS_WAKE	(1 << 14)
332 #define ACPI_FADT_PLATFORM_CLOCK	(1 << 15)
333 #define ACPI_FADT_S4_RTC_VALID		(1 << 16)
334 #define ACPI_FADT_REMOTE_POWER_ON	(1 << 17)
335 #define ACPI_FADT_APIC_CLUSTER		(1 << 18)
336 #define ACPI_FADT_APIC_PHYSICAL		(1 << 19)
337 /* Bits 20-31: reserved ACPI 3.0 & 4.0 */
338 #define ACPI_FADT_HW_REDUCED_ACPI	(1 << 20)
339 #define ACPI_FADT_LOW_PWR_IDLE_S0	(1 << 21)
340 /* bits 22-31: reserved ACPI 5.0 */
341 
342 /* FADT Boot Architecture Flags */
343 #define ACPI_FADT_LEGACY_DEVICES	(1 << 0)
344 #define ACPI_FADT_8042			(1 << 1)
345 #define ACPI_FADT_VGA_NOT_PRESENT	(1 << 2)
346 #define ACPI_FADT_MSI_NOT_SUPPORTED	(1 << 3)
347 #define ACPI_FADT_NO_PCIE_ASPM_CONTROL	(1 << 4)
348 /* No legacy devices (including 8042) */
349 #define ACPI_FADT_LEGACY_FREE		0x00
350 
351 /* FADT Preferred Power Management Profile */
352 #define PM_UNSPECIFIED		0
353 #define PM_DESKTOP		1
354 #define PM_MOBILE		2
355 #define PM_WORKSTATION		3
356 #define PM_ENTERPRISE_SERVER	4
357 #define PM_SOHO_SERVER		5
358 #define PM_APPLIANCE_PC		6
359 #define PM_PERFORMANCE_SERVER	7
360 #define PM_TABLET		8	/* ACPI 5.0 */
361 
362 /* FACS (Firmware ACPI Control Structure) */
363 struct acpi_facs {
364 	char signature[4];			/* "FACS" */
365 	u32 length;				/* Length in bytes (>= 64) */
366 	u32 hardware_signature;			/* Hardware signature */
367 	u32 firmware_waking_vector;		/* Firmware waking vector */
368 	u32 global_lock;			/* Global lock */
369 	u32 flags;				/* FACS flags */
370 	u32 x_firmware_waking_vector_l;		/* X FW waking vector, low */
371 	u32 x_firmware_waking_vector_h;		/* X FW waking vector, high */
372 	u8 version;				/* ACPI 4.0: 2 */
373 	u8 resv[31];				/* FIXME: 4.0: ospm_flags */
374 };
375 
376 /* FACS flags */
377 #define ACPI_FACS_S4BIOS_F	(1 << 0)
378 #define ACPI_FACS_64BIT_WAKE_F	(1 << 1)
379 /* Bits 31..2: reserved */
380 
381 /* These can be used by the target port */
382 
383 unsigned long acpi_create_madt_lapics(unsigned long current);
384 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, u32 addr,
385 			 u32 gsi_base);
386 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
387 			 u8 bus, u8 source, u32 gsirq, u16 flags);
388 unsigned long acpi_fill_madt(unsigned long current);
389 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
390 			 void *dsdt);
391 int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, u8 cpu,
392 			 u16 flags, u8 lint);
393 u32 write_acpi_tables(u32 start);
394