1 /* 2 * Based on acpi.c from coreboot 3 * 4 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com> 5 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #define RSDP_SIG "RSD PTR " /* RSDP pointer signature */ 11 #define OEM_ID "U-BOOT" /* U-Boot */ 12 #define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */ 13 #define ASLC_ID "INTL" /* Intel ASL Compiler */ 14 15 #define ACPI_RSDP_REV_ACPI_1_0 0 16 #define ACPI_RSDP_REV_ACPI_2_0 2 17 18 /* 19 * RSDP (Root System Description Pointer) 20 * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum 21 */ 22 struct acpi_rsdp { 23 char signature[8]; /* RSDP signature */ 24 u8 checksum; /* Checksum of the first 20 bytes */ 25 char oem_id[6]; /* OEM ID */ 26 u8 revision; /* 0 for ACPI 1.0, others 2 */ 27 u32 rsdt_address; /* Physical address of RSDT (32 bits) */ 28 u32 length; /* Total RSDP length (incl. extended part) */ 29 u64 xsdt_address; /* Physical address of XSDT (64 bits) */ 30 u8 ext_checksum; /* Checksum of the whole table */ 31 u8 reserved[3]; 32 }; 33 34 /* Generic ACPI header, provided by (almost) all tables */ 35 struct acpi_table_header { 36 char signature[4]; /* ACPI signature (4 ASCII characters) */ 37 u32 length; /* Table length in bytes (incl. header) */ 38 u8 revision; /* Table version (not ACPI version!) */ 39 volatile u8 checksum; /* To make sum of entire table == 0 */ 40 char oem_id[6]; /* OEM identification */ 41 char oem_table_id[8]; /* OEM table identification */ 42 u32 oem_revision; /* OEM revision number */ 43 char aslc_id[4]; /* ASL compiler vendor ID */ 44 u32 aslc_revision; /* ASL compiler revision number */ 45 }; 46 47 /* A maximum number of 32 ACPI tables ought to be enough for now */ 48 #define MAX_ACPI_TABLES 32 49 50 /* RSDT (Root System Description Table) */ 51 struct acpi_rsdt { 52 struct acpi_table_header header; 53 u32 entry[MAX_ACPI_TABLES]; 54 }; 55 56 /* XSDT (Extended System Description Table) */ 57 struct acpi_xsdt { 58 struct acpi_table_header header; 59 u64 entry[MAX_ACPI_TABLES]; 60 }; 61 62 /* FADT Preferred Power Management Profile */ 63 enum acpi_pm_profile { 64 ACPI_PM_UNSPECIFIED = 0, 65 ACPI_PM_DESKTOP, 66 ACPI_PM_MOBILE, 67 ACPI_PM_WORKSTATION, 68 ACPI_PM_ENTERPRISE_SERVER, 69 ACPI_PM_SOHO_SERVER, 70 ACPI_PM_APPLIANCE_PC, 71 ACPI_PM_PERFORMANCE_SERVER, 72 ACPI_PM_TABLET 73 }; 74 75 /* FADT flags for p_lvl2_lat and p_lvl3_lat */ 76 #define ACPI_FADT_C2_NOT_SUPPORTED 101 77 #define ACPI_FADT_C3_NOT_SUPPORTED 1001 78 79 /* FADT Boot Architecture Flags */ 80 #define ACPI_FADT_LEGACY_FREE 0x00 81 #define ACPI_FADT_LEGACY_DEVICES (1 << 0) 82 #define ACPI_FADT_8042 (1 << 1) 83 #define ACPI_FADT_VGA_NOT_PRESENT (1 << 2) 84 #define ACPI_FADT_MSI_NOT_SUPPORTED (1 << 3) 85 #define ACPI_FADT_NO_PCIE_ASPM_CONTROL (1 << 4) 86 87 /* FADT Feature Flags */ 88 #define ACPI_FADT_WBINVD (1 << 0) 89 #define ACPI_FADT_WBINVD_FLUSH (1 << 1) 90 #define ACPI_FADT_C1_SUPPORTED (1 << 2) 91 #define ACPI_FADT_C2_MP_SUPPORTED (1 << 3) 92 #define ACPI_FADT_POWER_BUTTON (1 << 4) 93 #define ACPI_FADT_SLEEP_BUTTON (1 << 5) 94 #define ACPI_FADT_FIXED_RTC (1 << 6) 95 #define ACPI_FADT_S4_RTC_WAKE (1 << 7) 96 #define ACPI_FADT_32BIT_TIMER (1 << 8) 97 #define ACPI_FADT_DOCKING_SUPPORTED (1 << 9) 98 #define ACPI_FADT_RESET_REGISTER (1 << 10) 99 #define ACPI_FADT_SEALED_CASE (1 << 11) 100 #define ACPI_FADT_HEADLESS (1 << 12) 101 #define ACPI_FADT_SLEEP_TYPE (1 << 13) 102 #define ACPI_FADT_PCI_EXPRESS_WAKE (1 << 14) 103 #define ACPI_FADT_PLATFORM_CLOCK (1 << 15) 104 #define ACPI_FADT_S4_RTC_VALID (1 << 16) 105 #define ACPI_FADT_REMOTE_POWER_ON (1 << 17) 106 #define ACPI_FADT_APIC_CLUSTER (1 << 18) 107 #define ACPI_FADT_APIC_PHYSICAL (1 << 19) 108 #define ACPI_FADT_HW_REDUCED_ACPI (1 << 20) 109 #define ACPI_FADT_LOW_PWR_IDLE_S0 (1 << 21) 110 111 enum acpi_address_space_type { 112 ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */ 113 ACPI_ADDRESS_SPACE_IO, /* System I/O */ 114 ACPI_ADDRESS_SPACE_PCI, /* PCI config space */ 115 ACPI_ADDRESS_SPACE_EC, /* Embedded controller */ 116 ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */ 117 ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */ 118 ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */ 119 }; 120 121 enum acpi_address_space_size { 122 ACPI_ACCESS_SIZE_UNDEFINED = 0, 123 ACPI_ACCESS_SIZE_BYTE_ACCESS, 124 ACPI_ACCESS_SIZE_WORD_ACCESS, 125 ACPI_ACCESS_SIZE_DWORD_ACCESS, 126 ACPI_ACCESS_SIZE_QWORD_ACCESS 127 }; 128 129 struct acpi_gen_regaddr { 130 u8 space_id; /* Address space ID */ 131 u8 bit_width; /* Register size in bits */ 132 u8 bit_offset; /* Register bit offset */ 133 u8 access_size; /* Access size */ 134 u32 addrl; /* Register address, low 32 bits */ 135 u32 addrh; /* Register address, high 32 bits */ 136 }; 137 138 /* FADT (Fixed ACPI Description Table) */ 139 struct __packed acpi_fadt { 140 struct acpi_table_header header; 141 u32 firmware_ctrl; 142 u32 dsdt; 143 u8 res1; 144 u8 preferred_pm_profile; 145 u16 sci_int; 146 u32 smi_cmd; 147 u8 acpi_enable; 148 u8 acpi_disable; 149 u8 s4bios_req; 150 u8 pstate_cnt; 151 u32 pm1a_evt_blk; 152 u32 pm1b_evt_blk; 153 u32 pm1a_cnt_blk; 154 u32 pm1b_cnt_blk; 155 u32 pm2_cnt_blk; 156 u32 pm_tmr_blk; 157 u32 gpe0_blk; 158 u32 gpe1_blk; 159 u8 pm1_evt_len; 160 u8 pm1_cnt_len; 161 u8 pm2_cnt_len; 162 u8 pm_tmr_len; 163 u8 gpe0_blk_len; 164 u8 gpe1_blk_len; 165 u8 gpe1_base; 166 u8 cst_cnt; 167 u16 p_lvl2_lat; 168 u16 p_lvl3_lat; 169 u16 flush_size; 170 u16 flush_stride; 171 u8 duty_offset; 172 u8 duty_width; 173 u8 day_alrm; 174 u8 mon_alrm; 175 u8 century; 176 u16 iapc_boot_arch; 177 u8 res2; 178 u32 flags; 179 struct acpi_gen_regaddr reset_reg; 180 u8 reset_value; 181 u8 res3; 182 u8 res4; 183 u8 res5; 184 u32 x_firmware_ctl_l; 185 u32 x_firmware_ctl_h; 186 u32 x_dsdt_l; 187 u32 x_dsdt_h; 188 struct acpi_gen_regaddr x_pm1a_evt_blk; 189 struct acpi_gen_regaddr x_pm1b_evt_blk; 190 struct acpi_gen_regaddr x_pm1a_cnt_blk; 191 struct acpi_gen_regaddr x_pm1b_cnt_blk; 192 struct acpi_gen_regaddr x_pm2_cnt_blk; 193 struct acpi_gen_regaddr x_pm_tmr_blk; 194 struct acpi_gen_regaddr x_gpe0_blk; 195 struct acpi_gen_regaddr x_gpe1_blk; 196 }; 197 198 /* FACS flags */ 199 #define ACPI_FACS_S4BIOS_F (1 << 0) 200 #define ACPI_FACS_64BIT_WAKE_F (1 << 1) 201 202 /* FACS (Firmware ACPI Control Structure) */ 203 struct acpi_facs { 204 char signature[4]; /* "FACS" */ 205 u32 length; /* Length in bytes (>= 64) */ 206 u32 hardware_signature; /* Hardware signature */ 207 u32 firmware_waking_vector; /* Firmware waking vector */ 208 u32 global_lock; /* Global lock */ 209 u32 flags; /* FACS flags */ 210 u32 x_firmware_waking_vector_l; /* X FW waking vector, low */ 211 u32 x_firmware_waking_vector_h; /* X FW waking vector, high */ 212 u8 version; /* Version 2 */ 213 u8 res1[3]; 214 u32 ospm_flags; /* OSPM enabled flags */ 215 u8 res2[24]; 216 }; 217 218 /* MADT flags */ 219 #define ACPI_MADT_PCAT_COMPAT (1 << 0) 220 221 /* MADT (Multiple APIC Description Table) */ 222 struct acpi_madt { 223 struct acpi_table_header header; 224 u32 lapic_addr; /* Local APIC address */ 225 u32 flags; /* Multiple APIC flags */ 226 }; 227 228 /* MADT: APIC Structure Type*/ 229 enum acpi_apic_types { 230 ACPI_APIC_LAPIC = 0, /* Processor local APIC */ 231 ACPI_APIC_IOAPIC, /* I/O APIC */ 232 ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */ 233 ACPI_APIC_NMI_SRC, /* NMI source */ 234 ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */ 235 ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */ 236 ACPI_APIC_IOSAPIC, /* I/O SAPIC */ 237 ACPI_APIC_LSAPIC, /* Local SAPIC */ 238 ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */ 239 ACPI_APIC_LX2APIC, /* Processor local x2APIC */ 240 ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */ 241 }; 242 243 /* MADT: Processor Local APIC Structure */ 244 245 #define LOCAL_APIC_FLAG_ENABLED (1 << 0) 246 247 struct acpi_madt_lapic { 248 u8 type; /* Type (0) */ 249 u8 length; /* Length in bytes (8) */ 250 u8 processor_id; /* ACPI processor ID */ 251 u8 apic_id; /* Local APIC ID */ 252 u32 flags; /* Local APIC flags */ 253 }; 254 255 /* MADT: I/O APIC Structure */ 256 struct acpi_madt_ioapic { 257 u8 type; /* Type (1) */ 258 u8 length; /* Length in bytes (12) */ 259 u8 ioapic_id; /* I/O APIC ID */ 260 u8 reserved; 261 u32 ioapic_addr; /* I/O APIC address */ 262 u32 gsi_base; /* Global system interrupt base */ 263 }; 264 265 /* MADT: Interrupt Source Override Structure */ 266 struct __packed acpi_madt_irqoverride { 267 u8 type; /* Type (2) */ 268 u8 length; /* Length in bytes (10) */ 269 u8 bus; /* ISA (0) */ 270 u8 source; /* Bus-relative int. source (IRQ) */ 271 u32 gsirq; /* Global system interrupt */ 272 u16 flags; /* MPS INTI flags */ 273 }; 274 275 /* MADT: Local APIC NMI Structure */ 276 struct __packed acpi_madt_lapic_nmi { 277 u8 type; /* Type (4) */ 278 u8 length; /* Length in bytes (6) */ 279 u8 processor_id; /* ACPI processor ID */ 280 u16 flags; /* MPS INTI flags */ 281 u8 lint; /* Local APIC LINT# */ 282 }; 283 284 /* MCFG (PCI Express MMIO config space BAR description table) */ 285 struct acpi_mcfg { 286 struct acpi_table_header header; 287 u8 reserved[8]; 288 }; 289 290 struct acpi_mcfg_mmconfig { 291 u32 base_address_l; 292 u32 base_address_h; 293 u16 pci_segment_group_number; 294 u8 start_bus_number; 295 u8 end_bus_number; 296 u8 reserved[4]; 297 }; 298 299 /* PM1_CNT bit defines */ 300 #define PM1_CNT_SCI_EN (1 << 0) 301 302 /* ACPI global NVS structure */ 303 struct acpi_global_nvs; 304 305 /* These can be used by the target port */ 306 307 void acpi_fill_header(struct acpi_table_header *header, char *signature); 308 void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, 309 void *dsdt); 310 int acpi_create_madt_lapics(u32 current); 311 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id, 312 u32 addr, u32 gsi_base); 313 int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride, 314 u8 bus, u8 source, u32 gsirq, u16 flags); 315 int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi, 316 u8 cpu, u16 flags, u8 lint); 317 u32 acpi_fill_madt(u32 current); 318 void acpi_create_gnvs(struct acpi_global_nvs *gnvs); 319 u32 write_acpi_tables(u32 start); 320