14372c111SBin Meng /* 24372c111SBin Meng * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> 34372c111SBin Meng * 44372c111SBin Meng * SPDX-License-Identifier: GPL-2.0+ 54372c111SBin Meng */ 64372c111SBin Meng 74372c111SBin Meng #ifndef __ASM_ACPI_S3_H__ 84372c111SBin Meng #define __ASM_ACPI_S3_H__ 94372c111SBin Meng 10*2b2d666fSBin Meng #define WAKEUP_BASE 0x600 11*2b2d666fSBin Meng 124372c111SBin Meng /* PM1_STATUS register */ 134372c111SBin Meng #define WAK_STS (1 << 15) 144372c111SBin Meng #define PCIEXPWAK_STS (1 << 14) 154372c111SBin Meng #define RTC_STS (1 << 10) 164372c111SBin Meng #define SLPBTN_STS (1 << 9) 174372c111SBin Meng #define PWRBTN_STS (1 << 8) 184372c111SBin Meng #define GBL_STS (1 << 5) 194372c111SBin Meng #define BM_STS (1 << 4) 204372c111SBin Meng #define TMR_STS (1 << 0) 214372c111SBin Meng 224372c111SBin Meng /* PM1_CNT register */ 234372c111SBin Meng #define SLP_EN (1 << 13) 244372c111SBin Meng #define SLP_TYP_SHIFT 10 254372c111SBin Meng #define SLP_TYP (7 << SLP_TYP_SHIFT) 264372c111SBin Meng #define SLP_TYP_S0 0 274372c111SBin Meng #define SLP_TYP_S1 1 284372c111SBin Meng #define SLP_TYP_S3 5 294372c111SBin Meng #define SLP_TYP_S4 6 304372c111SBin Meng #define SLP_TYP_S5 7 314372c111SBin Meng 32*2b2d666fSBin Meng #ifndef __ASSEMBLY__ 33*2b2d666fSBin Meng 34*2b2d666fSBin Meng extern char __wakeup[]; 35*2b2d666fSBin Meng extern int __wakeup_size; 36*2b2d666fSBin Meng 374372c111SBin Meng enum acpi_sleep_state { 384372c111SBin Meng ACPI_S0, 394372c111SBin Meng ACPI_S1, 404372c111SBin Meng ACPI_S2, 414372c111SBin Meng ACPI_S3, 424372c111SBin Meng ACPI_S4, 434372c111SBin Meng ACPI_S5, 444372c111SBin Meng }; 454372c111SBin Meng 464372c111SBin Meng /** 47b727961bSBin Meng * acpi_ss_string() - get ACPI-defined sleep state string 48b727961bSBin Meng * 49b727961bSBin Meng * @pm1_cnt: ACPI-defined sleep state 50b727961bSBin Meng * @return: a pointer to the sleep state string. 51b727961bSBin Meng */ 52b727961bSBin Meng static inline char *acpi_ss_string(enum acpi_sleep_state state) 53b727961bSBin Meng { 54b727961bSBin Meng char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"}; 55b727961bSBin Meng 56b727961bSBin Meng return ss_string[state]; 57b727961bSBin Meng } 58b727961bSBin Meng 59b727961bSBin Meng /** 604372c111SBin Meng * acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register 614372c111SBin Meng * 624372c111SBin Meng * @pm1_cnt: PM1_CNT register value 634372c111SBin Meng * @return: ACPI-defined sleep state if given valid PM1_CNT register value, 644372c111SBin Meng * -EINVAL otherwise. 654372c111SBin Meng */ 664372c111SBin Meng static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt) 674372c111SBin Meng { 684372c111SBin Meng switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) { 694372c111SBin Meng case SLP_TYP_S0: 704372c111SBin Meng return ACPI_S0; 714372c111SBin Meng case SLP_TYP_S1: 724372c111SBin Meng return ACPI_S1; 734372c111SBin Meng case SLP_TYP_S3: 744372c111SBin Meng return ACPI_S3; 754372c111SBin Meng case SLP_TYP_S4: 764372c111SBin Meng return ACPI_S4; 774372c111SBin Meng case SLP_TYP_S5: 784372c111SBin Meng return ACPI_S5; 794372c111SBin Meng } 804372c111SBin Meng 814372c111SBin Meng return -EINVAL; 824372c111SBin Meng } 834372c111SBin Meng 841206723bSBin Meng /** 851206723bSBin Meng * chipset_prev_sleep_state() - Get chipset previous sleep state 861206723bSBin Meng * 871206723bSBin Meng * This returns chipset previous sleep state from ACPI registers. 881206723bSBin Meng * Platform codes must supply this routine in order to support ACPI S3. 891206723bSBin Meng * 901206723bSBin Meng * @return ACPI_S0/S1/S2/S3/S4/S5. 911206723bSBin Meng */ 921206723bSBin Meng enum acpi_sleep_state chipset_prev_sleep_state(void); 931206723bSBin Meng 941206723bSBin Meng /** 951206723bSBin Meng * chipset_clear_sleep_state() - Clear chipset sleep state 961206723bSBin Meng * 971206723bSBin Meng * This clears chipset sleep state in ACPI registers. 981206723bSBin Meng * Platform codes must supply this routine in order to support ACPI S3. 991206723bSBin Meng */ 1001206723bSBin Meng void chipset_clear_sleep_state(void); 1011206723bSBin Meng 102*2b2d666fSBin Meng #endif /* __ASSEMBLY__ */ 103*2b2d666fSBin Meng 1044372c111SBin Meng #endif /* __ASM_ACPI_S3_H__ */ 105