1/* 2 * Copyright (C) 2016 Google, Inc 3 * Written by Simon Glass <sjg@chromium.org> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include <config.h> 9 10#ifdef CONFIG_ROM_SIZE 11/ { 12 binman { 13 filename = "u-boot.rom"; 14 end-at-4gb; 15 sort-by-pos; 16 pad-byte = <0xff>; 17 size = <CONFIG_ROM_SIZE>; 18#ifdef CONFIG_HAVE_INTEL_ME 19 intel-descriptor { 20 }; 21 intel-me { 22 }; 23#endif 24 u-boot-with-ucode-ptr { 25 pos = <CONFIG_SYS_TEXT_BASE>; 26 }; 27 u-boot-dtb-with-ucode { 28 }; 29 u-boot-ucode { 30 align = <16>; 31 }; 32#ifdef CONFIG_HAVE_MRC 33 intel-mrc { 34 pos = <CONFIG_X86_MRC_ADDR>; 35 }; 36#endif 37#ifdef CONFIG_HAVE_FSP 38 intel-fsp { 39 filename = CONFIG_FSP_FILE; 40 pos = <CONFIG_FSP_ADDR>; 41 }; 42#endif 43#ifdef CONFIG_HAVE_CMC 44 intel-cmc { 45 filename = CONFIG_CMC_FILE; 46 pos = <CONFIG_CMC_ADDR>; 47 }; 48#endif 49#ifdef CONFIG_HAVE_VGA_BIOS 50 intel-vga { 51 filename = CONFIG_VGA_BIOS_FILE; 52 pos = <CONFIG_VGA_BIOS_ADDR>; 53 }; 54#endif 55#ifdef CONFIG_HAVE_REFCODE 56 intel-refcode { 57 pos = <CONFIG_X86_REFCODE_ADDR>; 58 }; 59#endif 60 x86-start16 { 61 pos = <CONFIG_SYS_X86_START16>; 62 }; 63 }; 64}; 65#endif 66