1/* 2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/interrupt-router/intel-irq.h> 10 11/* ICH9 IRQ router has discrete PIRQ control registers */ 12#undef PIRQE 13#undef PIRQF 14#undef PIRQG 15#undef PIRQH 16#define PIRQE 8 17#define PIRQF 9 18#define PIRQG 10 19#define PIRQH 11 20 21/include/ "skeleton.dtsi" 22/include/ "serial.dtsi" 23 24/ { 25 model = "QEMU x86 (Q35)"; 26 compatible = "qemu,x86"; 27 28 config { 29 silent_console = <0>; 30 u-boot,no-apm-finalize; 31 }; 32 33 chosen { 34 stdout-path = "/serial"; 35 }; 36 37 pci { 38 compatible = "pci-x86"; 39 #address-cells = <3>; 40 #size-cells = <2>; 41 u-boot,dm-pre-reloc; 42 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 43 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 44 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 45 46 irq-router@1f,0 { 47 reg = <0x0000f800 0 0 0 0>; 48 compatible = "intel,irq-router"; 49 intel,pirq-config = "pci"; 50 intel,pirq-link = <0x60 8>; 51 intel,pirq-mask = <0x0e40>; 52 intel,pirq-routing = < 53 /* e1000 NIC */ 54 PCI_BDF(0, 2, 0) INTA PIRQG 55 /* ICH9 UHCI */ 56 PCI_BDF(0, 29, 0) INTA PIRQA 57 PCI_BDF(0, 29, 1) INTB PIRQB 58 PCI_BDF(0, 29, 2) INTC PIRQC 59 /* ICH9 EHCI */ 60 PCI_BDF(0, 29, 7) INTD PIRQD 61 /* ICH9 SATA */ 62 PCI_BDF(0, 31, 2) INTA PIRQA 63 >; 64 }; 65 }; 66 67}; 68