1/* 2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/x86-gpio.h> 10 11/include/ "skeleton.dtsi" 12/include/ "serial.dtsi" 13/include/ "rtc.dtsi" 14 15/ { 16 model = "Intel Minnowboard Max"; 17 compatible = "intel,minnowmax", "intel,baytrail"; 18 19 aliases { 20 serial0 = &serial; 21 spi0 = "/spi"; 22 }; 23 24 config { 25 silent_console = <0>; 26 }; 27 28 pch_pinctrl { 29 compatible = "intel,x86-pinctrl"; 30 io-base = <0x4c>; 31 32 pin_usb_host_en0@0 { 33 gpio-offset = <0x80 8>; 34 pad-offset = <0x260>; 35 mode-gpio; 36 output-value = <1>; 37 direction = <PIN_OUTPUT>; 38 }; 39 40 pin_usb_host_en1@0 { 41 gpio-offset = <0x80 9>; 42 pad-offset = <0x258>; 43 mode-gpio; 44 output-value = <1>; 45 direction = <PIN_OUTPUT>; 46 }; 47 }; 48 49 gpioa { 50 compatible = "intel,ich6-gpio"; 51 u-boot,dm-pre-reloc; 52 reg = <0 0x20>; 53 bank-name = "A"; 54 }; 55 56 gpiob { 57 compatible = "intel,ich6-gpio"; 58 u-boot,dm-pre-reloc; 59 reg = <0x20 0x20>; 60 bank-name = "B"; 61 }; 62 63 gpioc { 64 compatible = "intel,ich6-gpio"; 65 u-boot,dm-pre-reloc; 66 reg = <0x40 0x20>; 67 bank-name = "C"; 68 }; 69 70 gpiod { 71 compatible = "intel,ich6-gpio"; 72 u-boot,dm-pre-reloc; 73 reg = <0x60 0x20>; 74 bank-name = "D"; 75 }; 76 77 gpioe { 78 compatible = "intel,ich6-gpio"; 79 u-boot,dm-pre-reloc; 80 reg = <0x80 0x20>; 81 bank-name = "E"; 82 }; 83 84 gpiof { 85 compatible = "intel,ich6-gpio"; 86 u-boot,dm-pre-reloc; 87 reg = <0xA0 0x20>; 88 bank-name = "F"; 89 }; 90 91 chosen { 92 stdout-path = "/serial"; 93 }; 94 95 cpus { 96 #address-cells = <1>; 97 #size-cells = <0>; 98 99 cpu@0 { 100 device_type = "cpu"; 101 compatible = "intel,baytrail-cpu"; 102 reg = <0>; 103 intel,apic-id = <0>; 104 }; 105 106 cpu@1 { 107 device_type = "cpu"; 108 compatible = "intel,baytrail-cpu"; 109 reg = <1>; 110 intel,apic-id = <4>; 111 }; 112 113 }; 114 115 pci { 116 compatible = "intel,pci-baytrail", "pci-x86"; 117 #address-cells = <3>; 118 #size-cells = <2>; 119 u-boot,dm-pre-reloc; 120 ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0 0x10000000 121 0x42000000 0x0 0xc0000000 0xc0000000 0 0x10000000 122 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 123 }; 124 125 spi { 126 #address-cells = <1>; 127 #size-cells = <0>; 128 compatible = "intel,ich-spi"; 129 spi-flash@0 { 130 reg = <0>; 131 compatible = "stmicro,n25q064a", "spi-flash"; 132 memory-map = <0xff800000 0x00800000>; 133 }; 134 }; 135 136 microcode { 137 update@0 { 138#include "microcode/m0130673322.dtsi" 139 }; 140 }; 141 142}; 143