1*fa87abb6SPatrice Chotard /*
2*fa87abb6SPatrice Chotard  * This header provides constants for the STM32F7 RCC IP
3*fa87abb6SPatrice Chotard  */
4*fa87abb6SPatrice Chotard 
5*fa87abb6SPatrice Chotard #ifndef _DT_BINDINGS_MFD_STM32F7_RCC_H
6*fa87abb6SPatrice Chotard #define _DT_BINDINGS_MFD_STM32F7_RCC_H
7*fa87abb6SPatrice Chotard 
8*fa87abb6SPatrice Chotard /* AHB1 */
9*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOA		0
10*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOB		1
11*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOC		2
12*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOD		3
13*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOE		4
14*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOF		5
15*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOG		6
16*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOH		7
17*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOI		8
18*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOJ		9
19*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_GPIOK		10
20*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_CRC		12
21*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_BKPSRAM	18
22*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_DTCMRAM	20
23*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_DMA1		21
24*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_DMA2		22
25*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_DMA2D		23
26*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_ETHMAC		25
27*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_ETHMACTX	26
28*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_ETHMACRX	27
29*fa87abb6SPatrice Chotard #define STM32FF_RCC_AHB1_ETHMACPTP	28
30*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_OTGHS		29
31*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB1_OTGHSULPI	30
32*fa87abb6SPatrice Chotard 
33*fa87abb6SPatrice Chotard #define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8))
34*fa87abb6SPatrice Chotard #define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit)
35*fa87abb6SPatrice Chotard 
36*fa87abb6SPatrice Chotard 
37*fa87abb6SPatrice Chotard /* AHB2 */
38*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB2_DCMI		0
39*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB2_CRYP		4
40*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB2_HASH		5
41*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB2_RNG		6
42*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB2_OTGFS		7
43*fa87abb6SPatrice Chotard 
44*fa87abb6SPatrice Chotard #define STM32F7_AHB2_RESET(bit)	(STM32F7_RCC_AHB2_##bit + (0x14 * 8))
45*fa87abb6SPatrice Chotard #define STM32F7_AHB2_CLOCK(bit)	(STM32F7_RCC_AHB2_##bit + 0x20)
46*fa87abb6SPatrice Chotard 
47*fa87abb6SPatrice Chotard /* AHB3 */
48*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB3_FMC		0
49*fa87abb6SPatrice Chotard #define STM32F7_RCC_AHB3_QSPI		1
50*fa87abb6SPatrice Chotard 
51*fa87abb6SPatrice Chotard #define STM32F7_AHB3_RESET(bit)	(STM32F7_RCC_AHB3_##bit + (0x18 * 8))
52*fa87abb6SPatrice Chotard #define STM32F7_AHB3_CLOCK(bit)	(STM32F7_RCC_AHB3_##bit + 0x40)
53*fa87abb6SPatrice Chotard 
54*fa87abb6SPatrice Chotard /* APB1 */
55*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM2		0
56*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM3		1
57*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM4		2
58*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM5		3
59*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM6		4
60*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM7		5
61*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM12		6
62*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM13		7
63*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_TIM14		8
64*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_LPTIM1		9
65*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_WWDG		11
66*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_SPI2		14
67*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_SPI3		15
68*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_SPDIFRX	16
69*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART2		17
70*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART3		18
71*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART4		19
72*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART5		20
73*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_I2C1		21
74*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_I2C2		22
75*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_I2C3		23
76*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_I2C4		24
77*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_CAN1		25
78*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_CAN2		26
79*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_CEC		27
80*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_PWR		28
81*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_DAC		29
82*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART7		30
83*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB1_UART8		31
84*fa87abb6SPatrice Chotard 
85*fa87abb6SPatrice Chotard #define STM32F7_APB1_RESET(bit)	(STM32F7_RCC_APB1_##bit + (0x20 * 8))
86*fa87abb6SPatrice Chotard #define STM32F7_APB1_CLOCK(bit)	(STM32F7_RCC_APB1_##bit + 0x80)
87*fa87abb6SPatrice Chotard 
88*fa87abb6SPatrice Chotard /* APB2 */
89*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_TIM1		0
90*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_TIM8		1
91*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_USART1		4
92*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_USART6		5
93*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_ADC1		8
94*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_ADC2		9
95*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_ADC3		10
96*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SDMMC1		11
97*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SPI1		12
98*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SPI4		13
99*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SYSCFG		14
100*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_TIM9		16
101*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_TIM10		17
102*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_TIM11		18
103*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SPI5		20
104*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SPI6		21
105*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SAI1		22
106*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_SAI2		23
107*fa87abb6SPatrice Chotard #define STM32F7_RCC_APB2_LTDC		26
108*fa87abb6SPatrice Chotard 
109*fa87abb6SPatrice Chotard #define STM32F7_APB2_RESET(bit)	(STM32F7_RCC_APB2_##bit + (0x24 * 8))
110*fa87abb6SPatrice Chotard #define STM32F7_APB2_CLOCK(bit)	(STM32F7_RCC_APB2_##bit + 0xA0)
111*fa87abb6SPatrice Chotard 
112*fa87abb6SPatrice Chotard #endif /* _DT_BINDINGS_MFD_STM32F7_RCC_H */
113