1*fa87abb6SPatrice Chotard /* 2*fa87abb6SPatrice Chotard * stm32fx-clock.h 3*fa87abb6SPatrice Chotard * 4*fa87abb6SPatrice Chotard * Copyright (C) 2016 STMicroelectronics 5*fa87abb6SPatrice Chotard * Author: Gabriel Fernandez for STMicroelectronics. 6*fa87abb6SPatrice Chotard * License terms: GNU General Public License (GPL), version 2 7*fa87abb6SPatrice Chotard */ 8*fa87abb6SPatrice Chotard 9*fa87abb6SPatrice Chotard /* 10*fa87abb6SPatrice Chotard * List of clocks wich are not derived from system clock (SYSCLOCK) 11*fa87abb6SPatrice Chotard * 12*fa87abb6SPatrice Chotard * The index of these clocks is the secondary index of DT bindings 13*fa87abb6SPatrice Chotard * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) 14*fa87abb6SPatrice Chotard * 15*fa87abb6SPatrice Chotard * e.g: 16*fa87abb6SPatrice Chotard <assigned-clocks = <&rcc 1 CLK_LSE>; 17*fa87abb6SPatrice Chotard */ 18*fa87abb6SPatrice Chotard 19*fa87abb6SPatrice Chotard #ifndef _DT_BINDINGS_CLK_STMFX_H 20*fa87abb6SPatrice Chotard #define _DT_BINDINGS_CLK_STMFX_H 21*fa87abb6SPatrice Chotard 22*fa87abb6SPatrice Chotard #define SYSTICK 0 23*fa87abb6SPatrice Chotard #define FCLK 1 24*fa87abb6SPatrice Chotard #define CLK_LSI 2 25*fa87abb6SPatrice Chotard #define CLK_LSE 3 26*fa87abb6SPatrice Chotard #define CLK_HSE_RTC 4 27*fa87abb6SPatrice Chotard #define CLK_RTC 5 28*fa87abb6SPatrice Chotard #define PLL_VCO_I2S 6 29*fa87abb6SPatrice Chotard #define PLL_VCO_SAI 7 30*fa87abb6SPatrice Chotard #define CLK_LCD 8 31*fa87abb6SPatrice Chotard #define CLK_I2S 9 32*fa87abb6SPatrice Chotard #define CLK_SAI1 10 33*fa87abb6SPatrice Chotard #define CLK_SAI2 11 34*fa87abb6SPatrice Chotard #define CLK_I2SQ_PDIV 12 35*fa87abb6SPatrice Chotard #define CLK_SAIQ_PDIV 13 36*fa87abb6SPatrice Chotard 37*fa87abb6SPatrice Chotard #define END_PRIMARY_CLK 14 38*fa87abb6SPatrice Chotard 39*fa87abb6SPatrice Chotard #define CLK_HSI 14 40*fa87abb6SPatrice Chotard #define CLK_SYSCLK 15 41*fa87abb6SPatrice Chotard #define CLK_HDMI_CEC 16 42*fa87abb6SPatrice Chotard #define CLK_SPDIF 17 43*fa87abb6SPatrice Chotard #define CLK_USART1 18 44*fa87abb6SPatrice Chotard #define CLK_USART2 19 45*fa87abb6SPatrice Chotard #define CLK_USART3 20 46*fa87abb6SPatrice Chotard #define CLK_UART4 21 47*fa87abb6SPatrice Chotard #define CLK_UART5 22 48*fa87abb6SPatrice Chotard #define CLK_USART6 23 49*fa87abb6SPatrice Chotard #define CLK_UART7 24 50*fa87abb6SPatrice Chotard #define CLK_UART8 25 51*fa87abb6SPatrice Chotard #define CLK_I2C1 26 52*fa87abb6SPatrice Chotard #define CLK_I2C2 27 53*fa87abb6SPatrice Chotard #define CLK_I2C3 28 54*fa87abb6SPatrice Chotard #define CLK_I2C4 29 55*fa87abb6SPatrice Chotard #define CLK_LPTIMER 30 56*fa87abb6SPatrice Chotard 57*fa87abb6SPatrice Chotard #define END_PRIMARY_CLK_F7 31 58*fa87abb6SPatrice Chotard 59*fa87abb6SPatrice Chotard #endif 60