1*4157c472SMarek Vasut /* 2*4157c472SMarek Vasut * Copyright (C) 2015 Renesas Electronics Corp. 3*4157c472SMarek Vasut * 4*4157c472SMarek Vasut * This program is free software; you can redistribute it and/or modify 5*4157c472SMarek Vasut * it under the terms of the GNU General Public License as published by 6*4157c472SMarek Vasut * the Free Software Foundation; either version 2 of the License, or 7*4157c472SMarek Vasut * (at your option) any later version. 8*4157c472SMarek Vasut */ 9*4157c472SMarek Vasut #ifndef __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ 10*4157c472SMarek Vasut #define __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ 11*4157c472SMarek Vasut 12*4157c472SMarek Vasut #define CPG_CORE 0 /* Core Clock */ 13*4157c472SMarek Vasut #define CPG_MOD 1 /* Module Clock */ 14*4157c472SMarek Vasut 15*4157c472SMarek Vasut #endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */ 16