1*5cb19e7aSMarek Vasut /* 2*5cb19e7aSMarek Vasut * Copyright (C) 2016 Renesas Electronics Corp. 3*5cb19e7aSMarek Vasut * Copyright (C) 2017 Cogent Embedded, Inc. 4*5cb19e7aSMarek Vasut * 5*5cb19e7aSMarek Vasut * This program is free software; you can redistribute it and/or modify 6*5cb19e7aSMarek Vasut * it under the terms of the GNU General Public License as published by 7*5cb19e7aSMarek Vasut * the Free Software Foundation; either version 2 of the License, or 8*5cb19e7aSMarek Vasut * (at your option) any later version. 9*5cb19e7aSMarek Vasut */ 10*5cb19e7aSMarek Vasut #ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ 11*5cb19e7aSMarek Vasut #define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ 12*5cb19e7aSMarek Vasut 13*5cb19e7aSMarek Vasut #include <dt-bindings/clock/renesas-cpg-mssr.h> 14*5cb19e7aSMarek Vasut 15*5cb19e7aSMarek Vasut /* r8a77970 CPG Core Clocks */ 16*5cb19e7aSMarek Vasut #define R8A77970_CLK_Z2 0 17*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZR 1 18*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZTR 2 19*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZTRD2 3 20*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZT 4 21*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZX 5 22*5cb19e7aSMarek Vasut #define R8A77970_CLK_S1D1 6 23*5cb19e7aSMarek Vasut #define R8A77970_CLK_S1D2 7 24*5cb19e7aSMarek Vasut #define R8A77970_CLK_S1D4 8 25*5cb19e7aSMarek Vasut #define R8A77970_CLK_S2D1 9 26*5cb19e7aSMarek Vasut #define R8A77970_CLK_S2D2 10 27*5cb19e7aSMarek Vasut #define R8A77970_CLK_S2D4 11 28*5cb19e7aSMarek Vasut #define R8A77970_CLK_LB 12 29*5cb19e7aSMarek Vasut #define R8A77970_CLK_CL 13 30*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZB3 14 31*5cb19e7aSMarek Vasut #define R8A77970_CLK_ZB3D2 15 32*5cb19e7aSMarek Vasut #define R8A77970_CLK_DDR 16 33*5cb19e7aSMarek Vasut #define R8A77970_CLK_CR 17 34*5cb19e7aSMarek Vasut #define R8A77970_CLK_CRD2 18 35*5cb19e7aSMarek Vasut #define R8A77970_CLK_SD0H 19 36*5cb19e7aSMarek Vasut #define R8A77970_CLK_SD0 20 37*5cb19e7aSMarek Vasut #define R8A77970_CLK_RPC 21 38*5cb19e7aSMarek Vasut #define R8A77970_CLK_RPCD2 22 39*5cb19e7aSMarek Vasut #define R8A77970_CLK_MSO 23 40*5cb19e7aSMarek Vasut #define R8A77970_CLK_CANFD 24 41*5cb19e7aSMarek Vasut #define R8A77970_CLK_CSI0 25 42*5cb19e7aSMarek Vasut #define R8A77970_CLK_FRAY 26 43*5cb19e7aSMarek Vasut #define R8A77970_CLK_CP 27 44*5cb19e7aSMarek Vasut #define R8A77970_CLK_CPEX 28 45*5cb19e7aSMarek Vasut #define R8A77970_CLK_R 29 46*5cb19e7aSMarek Vasut #define R8A77970_CLK_OSC 30 47*5cb19e7aSMarek Vasut 48*5cb19e7aSMarek Vasut #endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */ 49