1*92aa0995SMarek Vasut /* 2*92aa0995SMarek Vasut * r8a7793 clock definition 3*92aa0995SMarek Vasut * 4*92aa0995SMarek Vasut * Copyright (C) 2014 Renesas Electronics Corporation 5*92aa0995SMarek Vasut * 6*92aa0995SMarek Vasut * This program is free software; you can redistribute it and/or modify 7*92aa0995SMarek Vasut * it under the terms of the GNU General Public License as published by 8*92aa0995SMarek Vasut * the Free Software Foundation; version 2 of the License. 9*92aa0995SMarek Vasut * 10*92aa0995SMarek Vasut * This program is distributed in the hope that it will be useful, 11*92aa0995SMarek Vasut * but WITHOUT ANY WARRANTY; without even the implied warranty of 12*92aa0995SMarek Vasut * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13*92aa0995SMarek Vasut * GNU General Public License for more details. 14*92aa0995SMarek Vasut */ 15*92aa0995SMarek Vasut 16*92aa0995SMarek Vasut #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__ 17*92aa0995SMarek Vasut #define __DT_BINDINGS_CLOCK_R8A7793_H__ 18*92aa0995SMarek Vasut 19*92aa0995SMarek Vasut /* CPG */ 20*92aa0995SMarek Vasut #define R8A7793_CLK_MAIN 0 21*92aa0995SMarek Vasut #define R8A7793_CLK_PLL0 1 22*92aa0995SMarek Vasut #define R8A7793_CLK_PLL1 2 23*92aa0995SMarek Vasut #define R8A7793_CLK_PLL3 3 24*92aa0995SMarek Vasut #define R8A7793_CLK_LB 4 25*92aa0995SMarek Vasut #define R8A7793_CLK_QSPI 5 26*92aa0995SMarek Vasut #define R8A7793_CLK_SDH 6 27*92aa0995SMarek Vasut #define R8A7793_CLK_SD0 7 28*92aa0995SMarek Vasut #define R8A7793_CLK_Z 8 29*92aa0995SMarek Vasut #define R8A7793_CLK_RCAN 9 30*92aa0995SMarek Vasut #define R8A7793_CLK_ADSP 10 31*92aa0995SMarek Vasut 32*92aa0995SMarek Vasut /* MSTP0 */ 33*92aa0995SMarek Vasut #define R8A7793_CLK_MSIOF0 0 34*92aa0995SMarek Vasut 35*92aa0995SMarek Vasut /* MSTP1 */ 36*92aa0995SMarek Vasut #define R8A7793_CLK_VCP0 1 37*92aa0995SMarek Vasut #define R8A7793_CLK_VPC0 3 38*92aa0995SMarek Vasut #define R8A7793_CLK_SSP1 9 39*92aa0995SMarek Vasut #define R8A7793_CLK_TMU1 11 40*92aa0995SMarek Vasut #define R8A7793_CLK_3DG 12 41*92aa0995SMarek Vasut #define R8A7793_CLK_2DDMAC 15 42*92aa0995SMarek Vasut #define R8A7793_CLK_FDP1_1 18 43*92aa0995SMarek Vasut #define R8A7793_CLK_FDP1_0 19 44*92aa0995SMarek Vasut #define R8A7793_CLK_TMU3 21 45*92aa0995SMarek Vasut #define R8A7793_CLK_TMU2 22 46*92aa0995SMarek Vasut #define R8A7793_CLK_CMT0 24 47*92aa0995SMarek Vasut #define R8A7793_CLK_TMU0 25 48*92aa0995SMarek Vasut #define R8A7793_CLK_VSP1_DU1 27 49*92aa0995SMarek Vasut #define R8A7793_CLK_VSP1_DU0 28 50*92aa0995SMarek Vasut #define R8A7793_CLK_VSP1_S 31 51*92aa0995SMarek Vasut 52*92aa0995SMarek Vasut /* MSTP2 */ 53*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA2 2 54*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA1 3 55*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA0 4 56*92aa0995SMarek Vasut #define R8A7793_CLK_MSIOF2 5 57*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFB0 6 58*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFB1 7 59*92aa0995SMarek Vasut #define R8A7793_CLK_MSIOF1 8 60*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFB2 16 61*92aa0995SMarek Vasut #define R8A7793_CLK_SYS_DMAC1 18 62*92aa0995SMarek Vasut #define R8A7793_CLK_SYS_DMAC0 19 63*92aa0995SMarek Vasut 64*92aa0995SMarek Vasut /* MSTP3 */ 65*92aa0995SMarek Vasut #define R8A7793_CLK_TPU0 4 66*92aa0995SMarek Vasut #define R8A7793_CLK_SDHI2 11 67*92aa0995SMarek Vasut #define R8A7793_CLK_SDHI1 12 68*92aa0995SMarek Vasut #define R8A7793_CLK_SDHI0 14 69*92aa0995SMarek Vasut #define R8A7793_CLK_MMCIF0 15 70*92aa0995SMarek Vasut #define R8A7793_CLK_IIC0 18 71*92aa0995SMarek Vasut #define R8A7793_CLK_PCIEC 19 72*92aa0995SMarek Vasut #define R8A7793_CLK_IIC1 23 73*92aa0995SMarek Vasut #define R8A7793_CLK_SSUSB 28 74*92aa0995SMarek Vasut #define R8A7793_CLK_CMT1 29 75*92aa0995SMarek Vasut #define R8A7793_CLK_USBDMAC0 30 76*92aa0995SMarek Vasut #define R8A7793_CLK_USBDMAC1 31 77*92aa0995SMarek Vasut 78*92aa0995SMarek Vasut /* MSTP4 */ 79*92aa0995SMarek Vasut #define R8A7793_CLK_IRQC 7 80*92aa0995SMarek Vasut #define R8A7793_CLK_INTC_SYS 8 81*92aa0995SMarek Vasut 82*92aa0995SMarek Vasut /* MSTP5 */ 83*92aa0995SMarek Vasut #define R8A7793_CLK_AUDIO_DMAC1 1 84*92aa0995SMarek Vasut #define R8A7793_CLK_AUDIO_DMAC0 2 85*92aa0995SMarek Vasut #define R8A7793_CLK_ADSP_MOD 6 86*92aa0995SMarek Vasut #define R8A7793_CLK_THERMAL 22 87*92aa0995SMarek Vasut #define R8A7793_CLK_PWM 23 88*92aa0995SMarek Vasut 89*92aa0995SMarek Vasut /* MSTP7 */ 90*92aa0995SMarek Vasut #define R8A7793_CLK_EHCI 3 91*92aa0995SMarek Vasut #define R8A7793_CLK_HSUSB 4 92*92aa0995SMarek Vasut #define R8A7793_CLK_HSCIF2 13 93*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF5 14 94*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF4 15 95*92aa0995SMarek Vasut #define R8A7793_CLK_HSCIF1 16 96*92aa0995SMarek Vasut #define R8A7793_CLK_HSCIF0 17 97*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF3 18 98*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF2 19 99*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF1 20 100*92aa0995SMarek Vasut #define R8A7793_CLK_SCIF0 21 101*92aa0995SMarek Vasut #define R8A7793_CLK_DU1 23 102*92aa0995SMarek Vasut #define R8A7793_CLK_DU0 24 103*92aa0995SMarek Vasut #define R8A7793_CLK_LVDS0 26 104*92aa0995SMarek Vasut 105*92aa0995SMarek Vasut /* MSTP8 */ 106*92aa0995SMarek Vasut #define R8A7793_CLK_IPMMU_SGX 0 107*92aa0995SMarek Vasut #define R8A7793_CLK_VIN2 9 108*92aa0995SMarek Vasut #define R8A7793_CLK_VIN1 10 109*92aa0995SMarek Vasut #define R8A7793_CLK_VIN0 11 110*92aa0995SMarek Vasut #define R8A7793_CLK_ETHER 13 111*92aa0995SMarek Vasut #define R8A7793_CLK_SATA1 14 112*92aa0995SMarek Vasut #define R8A7793_CLK_SATA0 15 113*92aa0995SMarek Vasut 114*92aa0995SMarek Vasut /* MSTP9 */ 115*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO7 4 116*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO6 5 117*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO5 7 118*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO4 8 119*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO3 9 120*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO2 10 121*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO1 11 122*92aa0995SMarek Vasut #define R8A7793_CLK_GPIO0 12 123*92aa0995SMarek Vasut #define R8A7793_CLK_RCAN1 15 124*92aa0995SMarek Vasut #define R8A7793_CLK_RCAN0 16 125*92aa0995SMarek Vasut #define R8A7793_CLK_QSPI_MOD 17 126*92aa0995SMarek Vasut #define R8A7793_CLK_I2C5 25 127*92aa0995SMarek Vasut #define R8A7793_CLK_IICDVFS 26 128*92aa0995SMarek Vasut #define R8A7793_CLK_I2C4 27 129*92aa0995SMarek Vasut #define R8A7793_CLK_I2C3 28 130*92aa0995SMarek Vasut #define R8A7793_CLK_I2C2 29 131*92aa0995SMarek Vasut #define R8A7793_CLK_I2C1 30 132*92aa0995SMarek Vasut #define R8A7793_CLK_I2C0 31 133*92aa0995SMarek Vasut 134*92aa0995SMarek Vasut /* MSTP10 */ 135*92aa0995SMarek Vasut #define R8A7793_CLK_SSI_ALL 5 136*92aa0995SMarek Vasut #define R8A7793_CLK_SSI9 6 137*92aa0995SMarek Vasut #define R8A7793_CLK_SSI8 7 138*92aa0995SMarek Vasut #define R8A7793_CLK_SSI7 8 139*92aa0995SMarek Vasut #define R8A7793_CLK_SSI6 9 140*92aa0995SMarek Vasut #define R8A7793_CLK_SSI5 10 141*92aa0995SMarek Vasut #define R8A7793_CLK_SSI4 11 142*92aa0995SMarek Vasut #define R8A7793_CLK_SSI3 12 143*92aa0995SMarek Vasut #define R8A7793_CLK_SSI2 13 144*92aa0995SMarek Vasut #define R8A7793_CLK_SSI1 14 145*92aa0995SMarek Vasut #define R8A7793_CLK_SSI0 15 146*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_ALL 17 147*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_DVC1 18 148*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_DVC0 19 149*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_CTU1_MIX1 20 150*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_CTU0_MIX0 21 151*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC9 22 152*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC8 23 153*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC7 24 154*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC6 25 155*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC5 26 156*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC4 27 157*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC3 28 158*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC2 29 159*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC1 30 160*92aa0995SMarek Vasut #define R8A7793_CLK_SCU_SRC0 31 161*92aa0995SMarek Vasut 162*92aa0995SMarek Vasut /* MSTP11 */ 163*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA3 6 164*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA4 7 165*92aa0995SMarek Vasut #define R8A7793_CLK_SCIFA5 8 166*92aa0995SMarek Vasut 167*92aa0995SMarek Vasut #endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */ 168