1*edd15fcfSMarek Vasut /*
2*edd15fcfSMarek Vasut  * Copyright 2013 Ideas On Board SPRL
3*edd15fcfSMarek Vasut  *
4*edd15fcfSMarek Vasut  * This program is free software; you can redistribute it and/or modify
5*edd15fcfSMarek Vasut  * it under the terms of the GNU General Public License as published by
6*edd15fcfSMarek Vasut  * the Free Software Foundation; either version 2 of the License, or
7*edd15fcfSMarek Vasut  * (at your option) any later version.
8*edd15fcfSMarek Vasut  */
9*edd15fcfSMarek Vasut 
10*edd15fcfSMarek Vasut #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11*edd15fcfSMarek Vasut #define __DT_BINDINGS_CLOCK_R8A7791_H__
12*edd15fcfSMarek Vasut 
13*edd15fcfSMarek Vasut /* CPG */
14*edd15fcfSMarek Vasut #define R8A7791_CLK_MAIN		0
15*edd15fcfSMarek Vasut #define R8A7791_CLK_PLL0		1
16*edd15fcfSMarek Vasut #define R8A7791_CLK_PLL1		2
17*edd15fcfSMarek Vasut #define R8A7791_CLK_PLL3		3
18*edd15fcfSMarek Vasut #define R8A7791_CLK_LB			4
19*edd15fcfSMarek Vasut #define R8A7791_CLK_QSPI		5
20*edd15fcfSMarek Vasut #define R8A7791_CLK_SDH			6
21*edd15fcfSMarek Vasut #define R8A7791_CLK_SD0			7
22*edd15fcfSMarek Vasut #define R8A7791_CLK_Z			8
23*edd15fcfSMarek Vasut #define R8A7791_CLK_RCAN		9
24*edd15fcfSMarek Vasut #define R8A7791_CLK_ADSP		10
25*edd15fcfSMarek Vasut 
26*edd15fcfSMarek Vasut /* MSTP0 */
27*edd15fcfSMarek Vasut #define R8A7791_CLK_MSIOF0		0
28*edd15fcfSMarek Vasut 
29*edd15fcfSMarek Vasut /* MSTP1 */
30*edd15fcfSMarek Vasut #define R8A7791_CLK_VCP0		1
31*edd15fcfSMarek Vasut #define R8A7791_CLK_VPC0		3
32*edd15fcfSMarek Vasut #define R8A7791_CLK_JPU			6
33*edd15fcfSMarek Vasut #define R8A7791_CLK_SSP1		9
34*edd15fcfSMarek Vasut #define R8A7791_CLK_TMU1		11
35*edd15fcfSMarek Vasut #define R8A7791_CLK_3DG			12
36*edd15fcfSMarek Vasut #define R8A7791_CLK_2DDMAC		15
37*edd15fcfSMarek Vasut #define R8A7791_CLK_FDP1_1		18
38*edd15fcfSMarek Vasut #define R8A7791_CLK_FDP1_0		19
39*edd15fcfSMarek Vasut #define R8A7791_CLK_TMU3		21
40*edd15fcfSMarek Vasut #define R8A7791_CLK_TMU2		22
41*edd15fcfSMarek Vasut #define R8A7791_CLK_CMT0		24
42*edd15fcfSMarek Vasut #define R8A7791_CLK_TMU0		25
43*edd15fcfSMarek Vasut #define R8A7791_CLK_VSP1_DU1		27
44*edd15fcfSMarek Vasut #define R8A7791_CLK_VSP1_DU0		28
45*edd15fcfSMarek Vasut #define R8A7791_CLK_VSP1_S		31
46*edd15fcfSMarek Vasut 
47*edd15fcfSMarek Vasut /* MSTP2 */
48*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA2		2
49*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA1		3
50*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA0		4
51*edd15fcfSMarek Vasut #define R8A7791_CLK_MSIOF2		5
52*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFB0		6
53*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFB1		7
54*edd15fcfSMarek Vasut #define R8A7791_CLK_MSIOF1		8
55*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFB2		16
56*edd15fcfSMarek Vasut #define R8A7791_CLK_SYS_DMAC1		18
57*edd15fcfSMarek Vasut #define R8A7791_CLK_SYS_DMAC0		19
58*edd15fcfSMarek Vasut 
59*edd15fcfSMarek Vasut /* MSTP3 */
60*edd15fcfSMarek Vasut #define R8A7791_CLK_TPU0		4
61*edd15fcfSMarek Vasut #define R8A7791_CLK_SDHI2		11
62*edd15fcfSMarek Vasut #define R8A7791_CLK_SDHI1		12
63*edd15fcfSMarek Vasut #define R8A7791_CLK_SDHI0		14
64*edd15fcfSMarek Vasut #define R8A7791_CLK_MMCIF0		15
65*edd15fcfSMarek Vasut #define R8A7791_CLK_IIC0		18
66*edd15fcfSMarek Vasut #define R8A7791_CLK_PCIEC		19
67*edd15fcfSMarek Vasut #define R8A7791_CLK_IIC1		23
68*edd15fcfSMarek Vasut #define R8A7791_CLK_SSUSB		28
69*edd15fcfSMarek Vasut #define R8A7791_CLK_CMT1		29
70*edd15fcfSMarek Vasut #define R8A7791_CLK_USBDMAC0		30
71*edd15fcfSMarek Vasut #define R8A7791_CLK_USBDMAC1		31
72*edd15fcfSMarek Vasut 
73*edd15fcfSMarek Vasut /* MSTP4 */
74*edd15fcfSMarek Vasut #define R8A7791_CLK_IRQC		7
75*edd15fcfSMarek Vasut #define R8A7791_CLK_INTC_SYS		8
76*edd15fcfSMarek Vasut 
77*edd15fcfSMarek Vasut /* MSTP5 */
78*edd15fcfSMarek Vasut #define R8A7791_CLK_AUDIO_DMAC1		1
79*edd15fcfSMarek Vasut #define R8A7791_CLK_AUDIO_DMAC0		2
80*edd15fcfSMarek Vasut #define R8A7791_CLK_ADSP_MOD		6
81*edd15fcfSMarek Vasut #define R8A7791_CLK_THERMAL		22
82*edd15fcfSMarek Vasut #define R8A7791_CLK_PWM			23
83*edd15fcfSMarek Vasut 
84*edd15fcfSMarek Vasut /* MSTP7 */
85*edd15fcfSMarek Vasut #define R8A7791_CLK_EHCI		3
86*edd15fcfSMarek Vasut #define R8A7791_CLK_HSUSB		4
87*edd15fcfSMarek Vasut #define R8A7791_CLK_HSCIF2		13
88*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF5		14
89*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF4		15
90*edd15fcfSMarek Vasut #define R8A7791_CLK_HSCIF1		16
91*edd15fcfSMarek Vasut #define R8A7791_CLK_HSCIF0		17
92*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF3		18
93*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF2		19
94*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF1		20
95*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIF0		21
96*edd15fcfSMarek Vasut #define R8A7791_CLK_DU1			23
97*edd15fcfSMarek Vasut #define R8A7791_CLK_DU0			24
98*edd15fcfSMarek Vasut #define R8A7791_CLK_LVDS0		26
99*edd15fcfSMarek Vasut 
100*edd15fcfSMarek Vasut /* MSTP8 */
101*edd15fcfSMarek Vasut #define R8A7791_CLK_IPMMU_SGX		0
102*edd15fcfSMarek Vasut #define R8A7791_CLK_MLB			2
103*edd15fcfSMarek Vasut #define R8A7791_CLK_VIN2		9
104*edd15fcfSMarek Vasut #define R8A7791_CLK_VIN1		10
105*edd15fcfSMarek Vasut #define R8A7791_CLK_VIN0		11
106*edd15fcfSMarek Vasut #define R8A7791_CLK_ETHERAVB		12
107*edd15fcfSMarek Vasut #define R8A7791_CLK_ETHER		13
108*edd15fcfSMarek Vasut #define R8A7791_CLK_SATA1		14
109*edd15fcfSMarek Vasut #define R8A7791_CLK_SATA0		15
110*edd15fcfSMarek Vasut 
111*edd15fcfSMarek Vasut /* MSTP9 */
112*edd15fcfSMarek Vasut #define R8A7791_CLK_GYROADC		1
113*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO7		4
114*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO6		5
115*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO5		7
116*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO4		8
117*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO3		9
118*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO2		10
119*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO1		11
120*edd15fcfSMarek Vasut #define R8A7791_CLK_GPIO0		12
121*edd15fcfSMarek Vasut #define R8A7791_CLK_RCAN1		15
122*edd15fcfSMarek Vasut #define R8A7791_CLK_RCAN0		16
123*edd15fcfSMarek Vasut #define R8A7791_CLK_QSPI_MOD		17
124*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C5		25
125*edd15fcfSMarek Vasut #define R8A7791_CLK_IICDVFS		26
126*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C4		27
127*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C3		28
128*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C2		29
129*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C1		30
130*edd15fcfSMarek Vasut #define R8A7791_CLK_I2C0		31
131*edd15fcfSMarek Vasut 
132*edd15fcfSMarek Vasut /* MSTP10 */
133*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI_ALL		5
134*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI9		6
135*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI8		7
136*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI7		8
137*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI6		9
138*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI5		10
139*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI4		11
140*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI3		12
141*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI2		13
142*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI1		14
143*edd15fcfSMarek Vasut #define R8A7791_CLK_SSI0		15
144*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_ALL		17
145*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_DVC1		18
146*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_DVC0		19
147*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_CTU1_MIX1	20
148*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_CTU0_MIX0	21
149*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC9		22
150*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC8		23
151*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC7		24
152*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC6		25
153*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC5		26
154*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC4		27
155*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC3		28
156*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC2		29
157*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC1		30
158*edd15fcfSMarek Vasut #define R8A7791_CLK_SCU_SRC0		31
159*edd15fcfSMarek Vasut 
160*edd15fcfSMarek Vasut /* MSTP11 */
161*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA3		6
162*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA4		7
163*edd15fcfSMarek Vasut #define R8A7791_CLK_SCIFA5		8
164*edd15fcfSMarek Vasut 
165*edd15fcfSMarek Vasut #endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
166