1ccaa83f8SJorge Ramirez-Ortiz /* 2ccaa83f8SJorge Ramirez-Ortiz * Copyright (c) 2016 HiSilicon Technologies Co., Ltd. 3ccaa83f8SJorge Ramirez-Ortiz * 4ccaa83f8SJorge Ramirez-Ortiz * This program is free software; you can redistribute it and/or modify 5ccaa83f8SJorge Ramirez-Ortiz * it under the terms of the GNU General Public License as published by 6ccaa83f8SJorge Ramirez-Ortiz * the Free Software Foundation; either version 2 of the License, or 7ccaa83f8SJorge Ramirez-Ortiz * (at your option) any later version. 8ccaa83f8SJorge Ramirez-Ortiz * 9ccaa83f8SJorge Ramirez-Ortiz * This program is distributed in the hope that it will be useful, 10ccaa83f8SJorge Ramirez-Ortiz * but WITHOUT ANY WARRANTY; without even the implied warranty of 11ccaa83f8SJorge Ramirez-Ortiz * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12ccaa83f8SJorge Ramirez-Ortiz * GNU General Public License for more details. 13ccaa83f8SJorge Ramirez-Ortiz * 14ccaa83f8SJorge Ramirez-Ortiz * You should have received a copy of the GNU General Public License 15ccaa83f8SJorge Ramirez-Ortiz * along with this program. If not, see <http://www.gnu.org/licenses/>. 16ccaa83f8SJorge Ramirez-Ortiz */ 17ccaa83f8SJorge Ramirez-Ortiz 18ccaa83f8SJorge Ramirez-Ortiz #ifndef __DTS_HISTB_CLOCK_H 19ccaa83f8SJorge Ramirez-Ortiz #define __DTS_HISTB_CLOCK_H 20ccaa83f8SJorge Ramirez-Ortiz 21ccaa83f8SJorge Ramirez-Ortiz /* clocks provided by core CRG */ 22ccaa83f8SJorge Ramirez-Ortiz #define HISTB_OSC_CLK 0 23ccaa83f8SJorge Ramirez-Ortiz #define HISTB_APB_CLK 1 24ccaa83f8SJorge Ramirez-Ortiz #define HISTB_AHB_CLK 2 25ccaa83f8SJorge Ramirez-Ortiz #define HISTB_UART1_CLK 3 26ccaa83f8SJorge Ramirez-Ortiz #define HISTB_UART2_CLK 4 27ccaa83f8SJorge Ramirez-Ortiz #define HISTB_UART3_CLK 5 28ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C0_CLK 6 29ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C1_CLK 7 30ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C2_CLK 8 31ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C3_CLK 9 32ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C4_CLK 10 33ccaa83f8SJorge Ramirez-Ortiz #define HISTB_I2C5_CLK 11 34ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SPI0_CLK 12 35ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SPI1_CLK 13 36ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SPI2_CLK 14 37ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SCI_CLK 15 38ccaa83f8SJorge Ramirez-Ortiz #define HISTB_FMC_CLK 16 39ccaa83f8SJorge Ramirez-Ortiz #define HISTB_MMC_BIU_CLK 17 40ccaa83f8SJorge Ramirez-Ortiz #define HISTB_MMC_CIU_CLK 18 41ccaa83f8SJorge Ramirez-Ortiz #define HISTB_MMC_DRV_CLK 19 42ccaa83f8SJorge Ramirez-Ortiz #define HISTB_MMC_SAMPLE_CLK 20 43ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SDIO0_BIU_CLK 21 44ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SDIO0_CIU_CLK 22 45ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SDIO0_DRV_CLK 23 46ccaa83f8SJorge Ramirez-Ortiz #define HISTB_SDIO0_SAMPLE_CLK 24 47ccaa83f8SJorge Ramirez-Ortiz #define HISTB_PCIE_AUX_CLK 25 48ccaa83f8SJorge Ramirez-Ortiz #define HISTB_PCIE_PIPE_CLK 26 49ccaa83f8SJorge Ramirez-Ortiz #define HISTB_PCIE_SYS_CLK 27 50ccaa83f8SJorge Ramirez-Ortiz #define HISTB_PCIE_BUS_CLK 28 51ccaa83f8SJorge Ramirez-Ortiz #define HISTB_ETH0_MAC_CLK 29 52ccaa83f8SJorge Ramirez-Ortiz #define HISTB_ETH0_MACIF_CLK 30 53ccaa83f8SJorge Ramirez-Ortiz #define HISTB_ETH1_MAC_CLK 31 54ccaa83f8SJorge Ramirez-Ortiz #define HISTB_ETH1_MACIF_CLK 32 55ccaa83f8SJorge Ramirez-Ortiz #define HISTB_COMBPHY1_CLK 33 56*8eef803aSShawn Guo #define HISTB_USB2_BUS_CLK 34 57*8eef803aSShawn Guo #define HISTB_USB2_PHY_CLK 35 58*8eef803aSShawn Guo #define HISTB_USB2_UTMI_CLK 36 59*8eef803aSShawn Guo #define HISTB_USB2_12M_CLK 37 60*8eef803aSShawn Guo #define HISTB_USB2_48M_CLK 38 61*8eef803aSShawn Guo #define HISTB_USB2_OTG_UTMI_CLK 39 62*8eef803aSShawn Guo #define HISTB_USB2_PHY1_REF_CLK 40 63*8eef803aSShawn Guo #define HISTB_USB2_PHY2_REF_CLK 41 64*8eef803aSShawn Guo #define HISTB_COMBPHY0_CLK 42 65*8eef803aSShawn Guo #define HISTB_USB3_BUS_CLK 43 66*8eef803aSShawn Guo #define HISTB_USB3_UTMI_CLK 44 67*8eef803aSShawn Guo #define HISTB_USB3_PIPE_CLK 45 68*8eef803aSShawn Guo #define HISTB_USB3_SUSPEND_CLK 46 69*8eef803aSShawn Guo #define HISTB_USB3_BUS_CLK1 47 70*8eef803aSShawn Guo #define HISTB_USB3_UTMI_CLK1 48 71*8eef803aSShawn Guo #define HISTB_USB3_PIPE_CLK1 49 72*8eef803aSShawn Guo #define HISTB_USB3_SUSPEND_CLK1 50 73ccaa83f8SJorge Ramirez-Ortiz 74ccaa83f8SJorge Ramirez-Ortiz /* clocks provided by mcu CRG */ 75ccaa83f8SJorge Ramirez-Ortiz #define HISTB_MCE_CLK 1 76ccaa83f8SJorge Ramirez-Ortiz #define HISTB_IR_CLK 2 77ccaa83f8SJorge Ramirez-Ortiz #define HISTB_TIMER01_CLK 3 78ccaa83f8SJorge Ramirez-Ortiz #define HISTB_LEDC_CLK 4 79ccaa83f8SJorge Ramirez-Ortiz #define HISTB_UART0_CLK 5 80ccaa83f8SJorge Ramirez-Ortiz #define HISTB_LSADC_CLK 6 81ccaa83f8SJorge Ramirez-Ortiz 82ccaa83f8SJorge Ramirez-Ortiz #endif /* __DTS_HISTB_CLOCK_H */ 83