1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2016 Google Inc. 4 */ 5 6 /* Core Clocks */ 7 #define PLL_DPLL 2 8 #define PLL_D2PLL 3 9 10 /* Bus Clocks, derived from core clocks */ 11 #define BCLK_PCLK 101 12 #define BCLK_LHCLK 102 13 #define BCLK_MACCLK 103 14 #define BCLK_SDCLK 104 15 #define BCLK_ARMCLK 105 16 17 /* Special clocks */ 18 #define PCLK_UART1 501 19 #define PCLK_UART2 502 20 #define PCLK_UART3 503 21 #define PCLK_UART4 504 22 #define PCLK_UART5 505 23 #define PCLK_MAC1 506 24 #define PCLK_MAC2 507 25 26 /* come from linux kernel */ 27 28 #define ASPEED_CLK_GATE_ECLK 0 29 #define ASPEED_CLK_GATE_GCLK 1 30 #define ASPEED_CLK_GATE_MCLK 2 31 #define ASPEED_CLK_GATE_VCLK 3 32 #define ASPEED_CLK_GATE_BCLK 4 33 #define ASPEED_CLK_GATE_DCLK 5 34 #define ASPEED_CLK_GATE_REFCLK 6 35 #define ASPEED_CLK_GATE_USBPORT2CLK 7 36 #define ASPEED_CLK_GATE_LCLK 8 37 #define ASPEED_CLK_GATE_USBUHCICLK 9 38 #define ASPEED_CLK_GATE_D1CLK 10 39 #define ASPEED_CLK_GATE_YCLK 11 40 #define ASPEED_CLK_GATE_USBPORT1CLK 12 41 #define ASPEED_CLK_GATE_UART1CLK 13 42 #define ASPEED_CLK_GATE_UART2CLK 14 43 #define ASPEED_CLK_GATE_UART5CLK 15 44 #define ASPEED_CLK_GATE_ESPICLK 16 45 #define ASPEED_CLK_GATE_MAC1CLK 17 46 #define ASPEED_CLK_GATE_MAC2CLK 18 47 #define ASPEED_CLK_GATE_RSACLK 19 48 #define ASPEED_CLK_GATE_UART3CLK 20 49 #define ASPEED_CLK_GATE_UART4CLK 21 50 #define ASPEED_CLK_GATE_SDCLK 22 51 #define ASPEED_CLK_GATE_LHCCLK 23 52 #define ASPEED_CLK_GATE_SDEXTCLK 24 53 #define ASPEED_CLK_HPLL 25 54 #define ASPEED_CLK_AHB 26 55 #define ASPEED_CLK_APB 27 56 #define ASPEED_CLK_UART 28 57 #define ASPEED_CLK_SDIO 29 58 #define ASPEED_CLK_ECLK 30 59 #define ASPEED_CLK_ECLK_MUX 31 60 #define ASPEED_CLK_LHCLK 32 61 #define ASPEED_CLK_MAC 33 62 #define ASPEED_CLK_BCLK 34 63 #define ASPEED_CLK_MPLL 35 64 #define ASPEED_CLK_24M 36 65 66