19604e92eSryan_chen /* SPDX-License-Identifier: GPL-2.0+ */ 29604e92eSryan_chen /* 39604e92eSryan_chen * Copyright 2016 Google Inc. 49604e92eSryan_chen */ 59604e92eSryan_chen 69604e92eSryan_chen 79604e92eSryan_chen /* Special clocks */ 89604e92eSryan_chen #define PCLK_UART1 501 99604e92eSryan_chen #define PCLK_UART2 502 109604e92eSryan_chen #define PCLK_UART3 503 119604e92eSryan_chen #define PCLK_UART4 504 129604e92eSryan_chen #define PCLK_UART5 505 139604e92eSryan_chen #define PCLK_MAC1 506 149604e92eSryan_chen #define PCLK_MAC2 507 15d1e64dd1Sryan_chen 16d1e64dd1Sryan_chen /* come from linux kernel */ 17d1e64dd1Sryan_chen 18d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_ECLK 0 19d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_GCLK 1 20d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_MCLK 2 21d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_VCLK 3 22d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_BCLK 4 23d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_DCLK 5 24d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_REFCLK 6 25d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_USBPORT2CLK 7 26d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_LCLK 8 27d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_USBUHCICLK 9 28d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_D1CLK 10 29d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_YCLK 11 30d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_USBPORT1CLK 12 31d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_UART1CLK 13 32d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_UART2CLK 14 33d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_UART5CLK 15 34d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_ESPICLK 16 35d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_MAC1CLK 17 36d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_MAC2CLK 18 37d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_RSACLK 19 38d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_UART3CLK 20 39d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_UART4CLK 21 40d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_SDCLK 22 41d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_LHCCLK 23 42d1e64dd1Sryan_chen #define ASPEED_CLK_GATE_SDEXTCLK 24 43d1e64dd1Sryan_chen #define ASPEED_CLK_HPLL 25 44d1e64dd1Sryan_chen #define ASPEED_CLK_AHB 26 45d1e64dd1Sryan_chen #define ASPEED_CLK_APB 27 46d1e64dd1Sryan_chen #define ASPEED_CLK_UART 28 47d1e64dd1Sryan_chen #define ASPEED_CLK_SDIO 29 48d1e64dd1Sryan_chen #define ASPEED_CLK_ECLK 30 49d1e64dd1Sryan_chen #define ASPEED_CLK_ECLK_MUX 31 50d1e64dd1Sryan_chen #define ASPEED_CLK_LHCLK 32 51d1e64dd1Sryan_chen #define ASPEED_CLK_MAC 33 52d1e64dd1Sryan_chen #define ASPEED_CLK_BCLK 34 53d1e64dd1Sryan_chen #define ASPEED_CLK_MPLL 35 54d1e64dd1Sryan_chen #define ASPEED_CLK_24M 36 55d1e64dd1Sryan_chen 56*39283ea7Sryan_chen #define ASPEED_CLK_D2PLL 37 57*39283ea7Sryan_chen 58