xref: /openbmc/u-boot/arch/x86/dts/edison.dts (revision 57efeb04)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2017 Intel Corporation
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/x86-gpio.h>
9#include <dt-bindings/interrupt-router/intel-irq.h>
10
11/include/ "skeleton.dtsi"
12/include/ "rtc.dtsi"
13/include/ "tsc_timer.dtsi"
14
15/ {
16	model = "Intel Edison";
17	compatible = "intel,edison";
18
19	aliases {
20		serial0 = &serial0;
21		serial1 = &serial1;
22		serial2 = &serial2;
23	};
24
25	chosen {
26		stdout-path = &serial2;
27	};
28
29	cpus {
30		#address-cells = <1>;
31		#size-cells = <0>;
32
33		cpu@0 {
34			device_type = "cpu";
35			compatible = "cpu-x86";
36			reg = <0>;
37			intel,apic-id = <0>;
38		};
39
40		cpu@1 {
41			device_type = "cpu";
42			compatible = "cpu-x86";
43			reg = <1>;
44			intel,apic-id = <2>;
45		};
46	};
47
48	pci {
49		compatible = "pci-x86";
50		#address-cells = <3>;
51		#size-cells = <2>;
52		u-boot,dm-pre-reloc;
53		ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
54			  0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
55			  0x01000000 0x0 0x2000 0x2000 0 0xe000>;
56	};
57
58	serial0: serial@ff010080 {
59		compatible = "intel,mid-uart";
60		reg = <0xff010080 0x100>;
61		reg-shift = <0>;
62		clock-frequency = <29491200>;
63		current-speed = <115200>;
64	};
65
66	serial1: serial@ff010100 {
67		compatible = "intel,mid-uart";
68		reg = <0xff010100 0x100>;
69		reg-shift = <0>;
70		clock-frequency = <29491200>;
71		current-speed = <115200>;
72	};
73
74	serial2: serial@ff010180 {
75		compatible = "intel,mid-uart";
76		reg = <0xff010180 0x100>;
77		reg-shift = <0>;
78		clock-frequency = <29491200>;
79		current-speed = <115200>;
80	};
81
82	emmc: mmc@ff3fc000 {
83		compatible = "intel,sdhci-tangier";
84		reg = <0xff3fc000 0x1000>;
85	};
86
87/*
88 * FIXME: For now U-Boot DM model doesn't allow to power up this controller.
89 * Enabling it will make U-Boot hang.
90 *
91	sdcard: mmc@ff3fa000 {
92		compatible = "intel,sdhci-tangier";
93		reg = <0xff3fa000 0x1000>;
94	};
95 */
96
97	pmu: power@ff00b000 {
98		compatible = "intel,pmu-mid";
99		reg = <0xff00b000 0x1000>;
100	};
101
102	scu: ipc@ff009000 {
103		compatible = "intel,scu-ipc";
104		reg = <0xff009000 0x1000>;
105	};
106
107	reset {
108		compatible = "intel,reset-tangier";
109		u-boot,dm-pre-reloc;
110	};
111
112	pinctrl {
113		compatible = "intel,pinctrl-tangier";
114		reg = <0xff0c0000 0x8000>;
115
116		/*
117		 * Initial configuration came from the firmware.
118		 * Which quite likely has been used in the phones, where I2C #8,
119		 * that is not part of Atom peripheral, is in use.
120		 * Thus we need to override the leftover.
121		 */
122		i2c6_scl@0 {
123			pad-offset = <111>;
124			mode-func = <1>;
125			protected;
126		};
127		i2c6_sda@0 {
128			pad-offset = <112>;
129			mode-func = <1>;
130			protected;
131		};
132	};
133};
134