1/* 2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/dts-v1/; 8 9/include/ "coreboot.dtsi" 10 11/ { 12 #address-cells = <1>; 13 #size-cells = <1>; 14 model = "Intel Crown Bay"; 15 compatible = "intel,crownbay", "intel,queensbay"; 16 17 config { 18 silent_console = <0>; 19 }; 20 21 gpioa { 22 compatible = "intel,ich6-gpio"; 23 u-boot,dm-pre-reloc; 24 reg = <0 0x20>; 25 bank-name = "A"; 26 }; 27 28 gpiob { 29 compatible = "intel,ich6-gpio"; 30 u-boot,dm-pre-reloc; 31 reg = <0x20 0x20>; 32 bank-name = "B"; 33 }; 34 35 serial { 36 reg = <0x3f8 8>; 37 clock-frequency = <115200>; 38 }; 39 40 chosen { }; 41 memory { device_type = "memory"; reg = <0 0>; }; 42 43 spi { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 compatible = "intel,ich7"; 47 spi-flash@0 { 48 reg = <0>; 49 compatible = "sst,25vf016b", "spi-flash"; 50 memory-map = <0xffe00000 0x00200000>; 51 }; 52 }; 53}; 54