1/dts-v1/;
2
3#include <dt-bindings/gpio/x86-gpio.h>
4
5/include/ "skeleton.dtsi"
6/include/ "keyboard.dtsi"
7/include/ "serial.dtsi"
8/include/ "reset.dtsi"
9/include/ "rtc.dtsi"
10/include/ "tsc_timer.dtsi"
11/include/ "coreboot_fb.dtsi"
12
13/ {
14	model = "Google Samus";
15	compatible = "google,samus", "intel,broadwell";
16
17	aliases {
18		spi0 = &spi;
19		usb0 = &usb_0;
20		usb1 = &usb_1;
21	};
22
23	config {
24	       silent_console = <0>;
25	};
26
27	cpus {
28		#address-cells = <1>;
29		#size-cells = <0>;
30
31		cpu@0 {
32			device_type = "cpu";
33			compatible = "intel,core-i3-gen5";
34			reg = <0>;
35			intel,apic-id = <0>;
36			intel,slow-ramp = <3>;
37		};
38
39		cpu@1 {
40			device_type = "cpu";
41			compatible = "intel,core-i3-gen5";
42			reg = <1>;
43			intel,apic-id = <1>;
44		};
45
46		cpu@2 {
47			device_type = "cpu";
48			compatible = "intel,core-i3-gen5";
49			reg = <2>;
50			intel,apic-id = <2>;
51		};
52
53		cpu@3 {
54			device_type = "cpu";
55			compatible = "intel,core-i3-gen5";
56			reg = <3>;
57			intel,apic-id = <3>;
58		};
59
60	};
61
62	chosen {
63		stdout-path = "/serial";
64	};
65
66	keyboard {
67		intel,duplicate-por;
68	};
69
70	pch_pinctrl {
71		compatible = "intel,x86-broadwell-pinctrl";
72		u-boot,dm-pre-reloc;
73		reg = <0 0>;
74
75		/* Put this first: it is the default */
76		gpio_unused: gpio-unused {
77			mode-gpio;
78			direction = <PIN_INPUT>;
79			owner = <OWNER_GPIO>;
80			sense-disable;
81		};
82
83		gpio_acpi_sci: acpi-sci {
84			mode-gpio;
85			direction = <PIN_INPUT>;
86			invert;
87			route = <ROUTE_SCI>;
88		};
89
90		gpio_acpi_smi: acpi-smi {
91			mode-gpio;
92			direction = <PIN_INPUT>;
93			invert;
94			route = <ROUTE_SMI>;
95		};
96
97		gpio_input: gpio-input {
98			mode-gpio;
99			direction = <PIN_INPUT>;
100			owner = <OWNER_GPIO>;
101		};
102
103		gpio_input_invert: gpio-input-invert {
104			mode-gpio;
105			direction = <PIN_INPUT>;
106			owner = <OWNER_GPIO>;
107			invert;
108		};
109
110		gpio_native: gpio-native {
111		};
112
113		gpio_out_high: gpio-out-high {
114			mode-gpio;
115			direction = <PIN_OUTPUT>;
116			output-value = <1>;
117			owner = <OWNER_GPIO>;
118			sense-disable;
119		};
120
121		gpio_out_low: gpio-out-low {
122			mode-gpio;
123			direction = <PIN_OUTPUT>;
124			output-value = <0>;
125			owner = <OWNER_GPIO>;
126			sense-disable;
127		};
128
129		gpio_pirq: gpio-pirq {
130			mode-gpio;
131			direction = <PIN_INPUT>;
132			owner = <OWNER_GPIO>;
133			pirq-apic = <PIRQ_APIC_ROUTE>;
134		};
135
136		soc_gpio@0 {
137			config =
138				<0 &gpio_unused 0>,	/* unused */
139				<1 &gpio_unused 0>,	/* unused */
140				<2 &gpio_unused 0>,	/* unused */
141				<3 &gpio_unused 0>,	/* unused */
142				<4 &gpio_native 0>,	/* native: i2c0_sda_gpio4 */
143				<5 &gpio_native 0>,	/* native: i2c0_scl_gpio5 */
144				<6 &gpio_native 0>,	/* native: i2c1_sda_gpio6 */
145				<7 &gpio_native 0>,	/* native: i2c1_scl_gpio7 */
146				<8 &gpio_acpi_sci 0>,	/* pch_lte_wake_l */
147				<9 &gpio_input_invert 0>,	/* trackpad_int_l (wake) */
148				<10 &gpio_acpi_sci 0>,	/* pch_wlan_wake_l */
149				<11 &gpio_unused 0>,	/* unused */
150				<12 &gpio_unused 0>,	/* unused */
151				<13 &gpio_pirq 3>,	/* trackpad_int_l (pirql) */
152				<14 &gpio_pirq 4>,	/* touch_int_l (pirqm) */
153				<15 &gpio_unused 0>,	/* unused (strap) */
154				<16 &gpio_input 0>,	/* pch_wp */
155				<17 &gpio_unused 0>,	/* unused */
156				<18 &gpio_unused 0>,	/* unused */
157				<19 &gpio_unused 0>,	/* unused */
158				<20 &gpio_native 0>,	/* pcie_wlan_clkreq_l */
159				<21 &gpio_out_high 0>,	/* pp3300_ssd_en */
160				<22 &gpio_unused 0>,	/* unused */
161				<23 &gpio_out_low 0>,	/* pp3300_autobahn_en */
162				<24 &gpio_unused 0>,	/* unused */
163				<25 &gpio_input 0>,	/* ec_in_rw */
164				<26 &gpio_unused 0>,	/* unused */
165				<27 &gpio_acpi_sci 0>,	/* pch_wake_l */
166				<28 &gpio_unused 0>,	/* unused */
167				<29 &gpio_unused 0>,	/* unused */
168				<30 &gpio_native 0>,	/* native: pch_suswarn_l */
169				<31 &gpio_native 0>,	/* native: acok_buf */
170				<32 &gpio_native 0>,	/* native: lpc_clkrun_l */
171				<33 &gpio_native 0>,	/* native: ssd_devslp */
172				<34 &gpio_acpi_smi 0>,	/* ec_smi_l */
173				<35 &gpio_acpi_smi 0>,	/* pch_nmi_dbg_l (route in nmi_en) */
174				<36 &gpio_acpi_sci 0>,	/* ec_sci_l */
175				<37 &gpio_unused 0>,	/* unused */
176				<38 &gpio_unused 0>,	/* unused */
177				<39 &gpio_unused 0>,	/* unused */
178				<40 &gpio_native 0>,	/* native: pch_usb1_oc_l */
179				<41 &gpio_native 0>,	/* native: pch_usb2_oc_l */
180				<42 &gpio_unused 0>,	/* wlan_disable_l */
181				<43 &gpio_out_high 0>,	/* pp1800_codec_en */
182				<44 &gpio_unused 0>,	/* unused */
183				<45 &gpio_acpi_sci 0>,	/* dsp_int - codec wake */
184				<46 &gpio_pirq 6>,	/* hotword_det_l_3v3 (pirqo) - codec irq */
185				<47 &gpio_out_low 0>,	/* ssd_reset_l */
186				<48 &gpio_unused 0>,	/* unused */
187				<49 &gpio_unused 0>,	/* unused */
188				<50 &gpio_unused 0>,	/* unused */
189				<51 &gpio_unused 0>,	/* unused */
190				<52 &gpio_input 0>,	/* sim_det */
191				<53 &gpio_unused 0>,	/* unused */
192				<54 &gpio_unused 0>,	/* unused */
193				<55 &gpio_unused 0>,	/* unused */
194				<56 &gpio_unused 0>,	/* unused */
195				<57 &gpio_out_high 0>,	/* codec_reset_l */
196				<58 &gpio_unused 0>,	/* unused */
197				<59 &gpio_out_high 0>,	/* lte_disable_l */
198				<60 &gpio_unused 0>,	/* unused */
199				<61 &gpio_native 0>,	/* native: pch_sus_stat */
200				<62 &gpio_native 0>,	/* native: pch_susclk */
201				<63 &gpio_native 0>,	/* native: pch_slp_s5_l */
202				<64 &gpio_unused 0>,	/* unused */
203				<65 &gpio_input 0>,	/* ram_id3 */
204				<66 &gpio_input 0>,	/* ram_id3_old (strap) */
205				<67 &gpio_input 0>,	/* ram_id0 */
206				<68 &gpio_input 0>,	/* ram_id1 */
207				<69 &gpio_input 0>,	/* ram_id2 */
208				<70 &gpio_unused 0>,	/* unused */
209				<71 &gpio_native 0>,	/* native: modphy_en */
210				<72 &gpio_unused 0>,	/* unused */
211				<73 &gpio_unused 0>,	/* unused */
212				<74 &gpio_unused 0>,	/* unused */
213				<75 &gpio_unused 0>,	/* unused */
214				<76 &gpio_unused 0>,	/* unused */
215				<77 &gpio_unused 0>,	/* unused */
216				<78 &gpio_unused 0>,	/* unused */
217				<79 &gpio_unused 0>,	/* unused */
218				<80 &gpio_unused 0>,	/* unused */
219				<81 &gpio_unused 0>,	/* unused */
220				<82 &gpio_native 0>,	/* native: ec_rcin_l */
221				<83 &gpio_native 0>,	/* gspi0_cs */
222				<84 &gpio_native 0>,	/* gspi0_clk */
223				<85 &gpio_native 0>,	/* gspi0_miso */
224				<86 &gpio_native 0>,	/* gspi0_mosi (strap) */
225				<87 &gpio_unused 0>,	/* unused */
226				<88 &gpio_unused 0>,	/* unused */
227				<89 &gpio_out_high 0>,	/* pp3300_sd_en */
228				<90 &gpio_unused 0>,	/* unused */
229				<91 &gpio_unused 0>,	/* unused */
230				<92 &gpio_unused 0>,	/* unused */
231				<93 &gpio_unused 0>,	/* unused */
232				<94 &gpio_unused 0>;	/* unused */
233		};
234	};
235
236	pci {
237		compatible = "pci-x86";
238		#address-cells = <3>;
239		#size-cells = <2>;
240		u-boot,dm-pre-reloc;
241		ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
242			0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
243			0x01000000 0x0 0x1000 0x1000 0 0xefff>;
244
245		northbridge@0,0 {
246			reg = <0x00000000 0 0 0 0>;
247			compatible = "intel,broadwell-northbridge";
248			board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>,
249					<&gpio_c 3 0>, <&gpio_c 1 0>;
250			u-boot,dm-pre-reloc;
251			spd {
252				#address-cells = <1>;
253				#size-cells = <0>;
254				samsung_4 {
255					reg = <6>;
256					data = [91 20 f1 03 04 11 05 0b
257						03 11 01 08 0a 00 50 01
258						78 78 90 50 90 11 50 e0
259						10 04 3c 3c 01 90 00 00
260						00 80 00 00 00 00 00 a8
261						00 00 00 00 00 00 00 00
262						00 00 00 00 00 00 00 00
263						00 00 00 00 0f 11 02 00
264						00 00 00 00 00 00 00 00
265						00 00 00 00 00 00 00 00
266						00 00 00 00 00 00 00 00
267						00 00 00 00 00 00 00 00
268						00 00 00 00 00 00 00 00
269						00 00 00 00 00 00 00 00
270						00 00 00 00 00 80 ce 01
271						00 00 55 00 00 00 00 00
272						4b 34 45 38 45 33 30 34
273						45 44 2d 45 47 43 45 20
274						20 20 00 00 80 ce 00 00
275						00 00 00 00 00 00 00 00
276						00 00 00 00 00 00 00 00
277						00 00 00 00 00 00 00 00
278						00 00 00 00 00 00 00 00
279						00 00 00 00 00 00 00 00
280						00 00 00 00 00 00 00 00
281						00 00 00 00 00 00 00 00
282						00 00 00 00 00 00 00 00
283						00 00 00 00 00 00 00 00
284						00 00 00 00 00 00 00 00
285						00 00 00 00 00 00 00 00
286						00 00 00 00 00 00 00 00
287						00 00 00 00 00 00 00 00];
288				};
289				hynix-h9ccnnnbltmlar-ntm-lpddr3-32 {
290					/*
291					 * banks 8, ranks 2, rows 14,
292					 * columns 10, density 4096 mb, x32
293					 */
294					reg = <8>;
295					data = [91 20 f1 03 04 11 05 0b
296						03 11 01 08 0a 00 50 01
297						78 78 90 50 90 11 50 e0
298						10 04 3c 3c 01 90 00 00
299						00 80 00 00 00 00 00 a8
300						00 00 00 00 00 00 00 00
301						00 00 00 00 00 00 00 00
302						00 00 00 00 0f 01 02 00
303						00 00 00 00 00 00 00 00
304						00 00 00 00 00 00 00 00
305						00 00 00 00 00 00 00 00
306						00 00 00 00 00 00 00 00
307						00 00 00 00 00 00 00 00
308						00 00 00 00 00 00 00 00
309						00 00 00 00 00 80 ad 00
310						00 00 55 00 00 00 00 00
311						48 39 43 43 4e 4e 4e 42
312						4c 54 4d 4c 41 52 2d 4e
313						54 4d 00 00 80 ad 00 00
314						00 00 00 00 00 00 00 00
315						00 00 00 00 00 00 00 00
316						00 00 00 00 00 00 00 00
317						00 00 00 00 00 00 00 00
318						00 00 00 00 00 00 00 00
319						00 00 00 00 00 00 00 00
320						00 00 00 00 00 00 00 00
321						00 00 00 00 00 00 00 00
322						00 00 00 00 00 00 00 00
323						00 00 00 00 00 00 00 00
324						00 00 00 00 00 00 00 00
325						00 00 00 00 00 00 00 00
326						00 00 00 00 00 00 00 00];
327					};
328				samsung_8 {
329					reg = <10>;
330					data = [91 20 f1 03 04 12 05 0a
331						03 11 01 08 0a 00 50 01
332						78 78 90 50 90 11 50 e0
333						10 04 3c 3c 01 90 00 00
334						00 80 00 00 00 00 00 a8
335						00 00 00 00 00 00 00 00
336						00 00 00 00 00 00 00 00
337						00 00 00 00 0f 11 02 00
338						00 00 00 00 00 00 00 00
339						00 00 00 00 00 00 00 00
340						00 00 00 00 00 00 00 00
341						00 00 00 00 00 00 00 00
342						00 00 00 00 00 00 00 00
343						00 00 00 00 00 00 00 00
344						00 00 00 00 00 80 ce 01
345						00 00 55 00 00 00 00 00
346						4b 34 45 36 45 33 30 34
347						45 44 2d 45 47 43 45 20
348						20 20 00 00 80 ce 00 00
349						00 00 00 00 00 00 00 00
350						00 00 00 00 00 00 00 00
351						00 00 00 00 00 00 00 00
352						00 00 00 00 00 00 00 00
353						00 00 00 00 00 00 00 00
354						00 00 00 00 00 00 00 00
355						00 00 00 00 00 00 00 00
356						00 00 00 00 00 00 00 00
357						00 00 00 00 00 00 00 00
358						00 00 00 00 00 00 00 00
359						00 00 00 00 00 00 00 00
360						00 00 00 00 00 00 00 00
361						00 00 00 00 00 00 00 00];
362				};
363				hynix-h9ccnnnbltmlar-ntm-lpddr3-16 {
364					/*
365					 * banks 8, ranks 2, rows 14,
366					 * columns 11, density 4096 mb, x16
367					 */
368					reg = <12>;
369					data = [91 20 f1 03 04 12 05 0a
370						03 11 01 08 0a 00 50 01
371						78 78 90 50 90 11 50 e0
372						10 04 3c 3c 01 90 00 00
373						00 80 00 00 00 00 00 a8
374						00 00 00 00 00 00 00 00
375						00 00 00 00 00 00 00 00
376						00 00 00 00 0f 01 02 00
377						00 00 00 00 00 00 00 00
378						00 00 00 00 00 00 00 00
379						00 00 00 00 00 00 00 00
380						00 00 00 00 00 00 00 00
381						00 00 00 00 00 00 00 00
382						00 00 00 00 00 00 00 00
383						00 00 00 00 00 80 ad 00
384						00 00 55 00 00 00 00 00
385						48 39 43 43 4e 4e 4e 42
386						4c 54 4d 4c 41 52 2d 4e
387						54 4d 00 00 80 ad 00 00
388						00 00 00 00 00 00 00 00
389						00 00 00 00 00 00 00 00
390						00 00 00 00 00 00 00 00
391						00 00 00 00 00 00 00 00
392						00 00 00 00 00 00 00 00
393						00 00 00 00 00 00 00 00
394						00 00 00 00 00 00 00 00
395						00 00 00 00 00 00 00 00
396						00 00 00 00 00 00 00 00
397						00 00 00 00 00 00 00 00
398						00 00 00 00 00 00 00 00
399						00 00 00 00 00 00 00 00
400						00 00 00 00 00 00 00 00];
401				};
402				hynix-h9ccnnncltmlar-lpddr3 {
403					/*
404					 * banks 8, ranks 2, rows 15,
405					 * columns 11, density 8192 mb, x16
406					 */
407					reg = <13>;
408					data = [91 20 f1 03 05 1a 05 0a
409						03 11 01 08 0a 00 50 01
410						78 78 90 50 90 11 50 e0
411						90 06 3c 3c 01 90 00 00
412						00 80 00 00 00 00 00 a8
413						00 00 00 00 00 00 00 00
414						00 00 00 00 00 00 00 00
415						00 00 00 00 0f 01 02 00
416						00 00 00 00 00 00 00 00
417						00 00 00 00 00 00 00 00
418						00 00 00 00 00 00 00 00
419						00 00 00 00 00 00 00 00
420						00 00 00 00 00 00 00 00
421						00 00 00 00 00 00 00 00
422						00 00 00 00 00 80 ad 00
423						00 00 55 00 00 00 00 00
424						48 39 43 43 4e 4e 4e 43
425						4c 54 4d 4c 41 52 00 00
426						00 00 00 00 80 ad 00 00
427						00 00 00 00 00 00 00 00
428						00 00 00 00 00 00 00 00
429						00 00 00 00 00 00 00 00
430						00 00 00 00 00 00 00 00
431						00 00 00 00 00 00 00 00
432						00 00 00 00 00 00 00 00
433						00 00 00 00 00 00 00 00
434						00 00 00 00 00 00 00 00
435						00 00 00 00 00 00 00 00
436						00 00 00 00 00 00 00 00
437						00 00 00 00 00 00 00 00
438						00 00 00 00 00 00 00 00
439						00 00 00 00 00 00 00 00];
440				};
441				elpida-edfb232a1ma {
442					/*
443					 * banks 8, ranks 2, rows 15,
444					 * columns 11, density 8192 mb, x16
445					 */
446					reg = <15>;
447					data = [91 20 f1 03 05 1a 05 0a
448						03 11 01 08 0a 00 50 01
449						78 78 90 50 90 11 50 e0
450						90 06 3c 3c 01 90 00 00
451						00 80 00 00 00 00 00 a8
452						00 00 00 00 00 00 00 00
453						00 00 00 00 00 00 00 00
454						00 00 00 00 0f 01 02 00
455						00 00 00 00 00 00 00 00
456						00 00 00 00 00 00 00 00
457						00 00 00 00 00 00 00 00
458						00 00 00 00 00 00 00 00
459						00 00 00 00 00 00 00 00
460						00 00 00 00 00 00 00 00
461						00 00 00 00 00 02 fe 00
462						00 00 00 00 00 00 00 00
463						45 44 46 42 32 33 32 41
464						31 4d 41 2d 47 44 2d 46
465						00 00 00 00 02 fe 00 00
466						00 00 00 00 00 00 00 00
467						00 00 00 00 00 00 00 00
468						00 00 00 00 00 00 00 00
469						00 00 00 00 00 00 00 00
470						00 00 00 00 00 00 00 00
471						00 00 00 00 00 00 00 00
472						00 00 00 00 00 00 00 00
473						00 00 00 00 00 00 00 00
474						00 00 00 00 00 00 00 00
475						00 00 00 00 00 00 00 00
476						00 00 00 00 00 00 00 00
477						00 00 00 00 00 00 00 00
478						00 00 00 00 00 00 00 00];
479				};
480			};
481		};
482
483		gma@2,0 {
484			reg = <0x00001000 0 0 0 0>;
485			compatible = "intel,broadwell-igd";
486			intel,dp-hotplug = <6 6 6>;
487			intel,port-select = <1>;	/* eDP */
488			intel,power-cycle-delay = <6>;
489			intel,power-up-delay = <2000>;
490			intel,power-down-delay = <500>;
491			intel,power-backlight-on-delay = <2000>;
492			intel,power-backlight-off-delay = <2000>;
493			intel,cpu-backlight = <0x00000200>;
494			intel,pch-backlight = <0x04000200>;
495			intel,pre-graphics-delay = <200>;
496		};
497
498		me@16,0 {
499			reg = <0x0000b000 0 0 0 0>;
500			compatible = "intel,me";
501			u-boot,dm-pre-reloc;
502		};
503
504		usb_1: usb@14,0 {
505			reg = <0x0000a000 0 0 0 0>;
506			compatible = "xhci-pci";
507		};
508
509		usb_0: usb@1d,0 {
510			status = "disabled";
511			reg = <0x0000e800 0 0 0 0>;
512			compatible = "ehci-pci";
513		};
514
515		pch@1f,0 {
516			reg = <0x0000f800 0 0 0 0>;
517			compatible = "intel,broadwell-pch";
518			u-boot,dm-pre-reloc;
519			#address-cells = <1>;
520			#size-cells = <1>;
521			intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
522						0x80 0x80 0x80 0x80>;
523			intel,gpi-routing = <0 0 0 0 0 0 0 2
524						1 0 0 0 0 0 0 0>;
525			/* Enable EC SMI source */
526			intel,alt-gp-smi-enable = <0x0040>;
527
528			/* EC-SCI is GPIO36 */
529			intel,gpe0-en = <0 0x10 0 0>;
530
531			power-enable-gpio = <&gpio_a 23 0>;
532
533			spi: spi {
534				#address-cells = <1>;
535				#size-cells = <0>;
536				compatible = "intel,ich9-spi";
537				spi-flash@0 {
538					#size-cells = <1>;
539					#address-cells = <1>;
540					reg = <0>;
541					compatible = "winbond,w25q64",
542							"spi-flash";
543					memory-map = <0xff800000 0x00800000>;
544					rw-mrc-cache {
545						label = "rw-mrc-cache";
546						reg = <0x003e0000 0x00010000>;
547					};
548				};
549			};
550
551			gpio_a: gpioa {
552				compatible = "intel,broadwell-gpio";
553				u-boot,dm-pre-reloc;
554				#gpio-cells = <2>;
555				gpio-controller;
556				reg = <0 0>;
557				bank-name = "A";
558			};
559
560			gpio_b: gpiob {
561				compatible = "intel,broadwell-gpio";
562				u-boot,dm-pre-reloc;
563				#gpio-cells = <2>;
564				gpio-controller;
565				reg = <1 0>;
566				bank-name = "B";
567			};
568
569			gpio_c: gpioc {
570				compatible = "intel,broadwell-gpio";
571				u-boot,dm-pre-reloc;
572				#gpio-cells = <2>;
573				gpio-controller;
574				reg = <2 0>;
575				bank-name = "C";
576			};
577
578			lpc {
579				compatible = "intel,broadwell-lpc";
580				#address-cells = <1>;
581				#size-cells = <0>;
582				u-boot,dm-pre-reloc;
583				intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
584				cros-ec@200 {
585					compatible = "google,cros-ec-lpc";
586					reg = <0x204 1 0x200 1 0x880 0x80>;
587
588					/*
589					 * Describes the flash memory within
590					 * the EC
591					 */
592					#address-cells = <1>;
593					#size-cells = <1>;
594					flash@8000000 {
595						reg = <0x08000000 0x20000>;
596						erase-value = <0xff>;
597					};
598				};
599			};
600		};
601
602		sata@1f,2 {
603			compatible = "intel,wildcatpoint-ahci";
604			reg = <0x0000fa00 0 0 0 0>;
605			u-boot,dm-pre-reloc;
606			intel,sata-mode = "ahci";
607			intel,sata-port-map = <1>;
608			intel,sata-port0-gen3-tx = <0x72>;
609			reset-gpio = <&gpio_b 15 GPIO_ACTIVE_LOW>;
610		};
611
612		smbus: smbus@1f,3 {
613			compatible = "intel,ich-i2c";
614			reg = <0x0000fb00 0 0 0 0>;
615			u-boot,dm-pre-reloc;
616		};
617	};
618
619	tpm {
620		reg = <0xfed40000 0x5000>;
621		compatible = "infineon,slb9635lpc";
622	};
623
624	microcode {
625		update@0 {
626#include "microcode/mc0306d4_00000018.dtsi"
627		};
628	};
629
630};
631