1/dts-v1/;
2
3#include <dt-bindings/gpio/x86-gpio.h>
4#include <dt-bindings/sound/azalia.h>
5#include <pci_ids.h>
6
7/include/ "skeleton.dtsi"
8/include/ "keyboard.dtsi"
9/include/ "serial.dtsi"
10/include/ "reset.dtsi"
11/include/ "rtc.dtsi"
12/include/ "tsc_timer.dtsi"
13
14/ {
15	model = "Google Link";
16	compatible = "google,link", "intel,celeron-ivybridge";
17
18	aliases {
19		spi0 = &spi;
20		usb0 = &usb_0;
21		usb1 = &usb_1;
22	};
23
24	config {
25	       silent_console = <0>;
26	};
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31
32		cpu@0 {
33			device_type = "cpu";
34			compatible = "intel,core-gen3";
35			reg = <0>;
36			intel,apic-id = <0>;
37		};
38
39		cpu@1 {
40			device_type = "cpu";
41			compatible = "intel,core-gen3";
42			reg = <1>;
43			intel,apic-id = <1>;
44		};
45
46		cpu@2 {
47			device_type = "cpu";
48			compatible = "intel,core-gen3";
49			reg = <2>;
50			intel,apic-id = <2>;
51		};
52
53		cpu@3 {
54			device_type = "cpu";
55			compatible = "intel,core-gen3";
56			reg = <3>;
57			intel,apic-id = <3>;
58		};
59
60	};
61
62	chosen {
63		stdout-path = "/serial";
64	};
65
66	keyboard {
67		intel,duplicate-por;
68	};
69
70	pch_pinctrl {
71		compatible = "intel,x86-pinctrl";
72		u-boot,dm-pre-reloc;
73		reg = <0 0>;
74
75		gpio_a0 {
76			gpio-offset = <0 0>;
77			mode-gpio;
78			direction = <PIN_INPUT>;
79		};
80
81		gpio_a1 {
82			gpio-offset = <0>;
83			mode-gpio;
84			direction = <PIN_OUTPUT>;
85			output-value = <1>;
86		};
87
88		gpio_a3 {
89			gpio-offset = <0 3>;
90			mode-gpio;
91			direction = <PIN_INPUT>;
92		};
93
94		gpio_a5 {
95			gpio-offset = <0 5>;
96			mode-gpio;
97			direction = <PIN_INPUT>;
98		};
99
100		gpio_a6 {
101			gpio-offset = <0 6>;
102			mode-gpio;
103			direction = <PIN_OUTPUT>;
104			output-value = <1>;
105		};
106
107		gpio_a7 {
108			gpio-offset = <0 7>;
109			mode-gpio;
110			direction = <PIN_INPUT>;
111			invert;
112		};
113
114		gpio_a8 {
115			gpio-offset = <0 8>;
116			mode-gpio;
117			direction = <PIN_INPUT>;
118			invert;
119		};
120
121		gpio_a9 {
122			gpio-offset = <0 9>;
123			mode-gpio;
124			direction = <PIN_INPUT>;
125		};
126
127		gpio_a10 {
128			u-boot,dm-pre-reloc;
129			gpio-offset = <0 10>;
130			mode-gpio;
131			direction = <PIN_INPUT>;
132		};
133
134		gpio_a11 {
135			gpio-offset = <0 11>;
136			mode-gpio;
137			direction = <PIN_INPUT>;
138		};
139
140		gpio_a12 {
141			gpio-offset = <0 12>;
142			mode-gpio;
143			direction = <PIN_INPUT>;
144			invert;
145		};
146
147		gpio_a14 {
148			gpio-offset = <0 14>;
149			mode-gpio;
150			direction = <PIN_INPUT>;
151			invert;
152		};
153
154		gpio_a15 {
155			gpio-offset = <0 15>;
156			mode-gpio;
157			direction = <PIN_INPUT>;
158			invert;
159		};
160
161		gpio_a21 {
162			gpio-offset = <0 21>;
163			mode-gpio;
164			direction = <PIN_INPUT>;
165		};
166
167		gpio_a24 {
168			gpio-offset = <0 24>;
169			mode-gpio;
170			output-value = <0>;
171			direction = <PIN_OUTPUT>;
172		};
173
174		gpio_a28 {
175			gpio-offset = <0 28>;
176			mode-gpio;
177			direction = <PIN_INPUT>;
178		};
179
180		gpio_b4 {
181			gpio-offset = <0x30 4>;
182			mode-gpio;
183			direction = <PIN_OUTPUT>;
184			output-value = <1>;
185		};
186
187		gpio_b9 {
188			u-boot,dm-pre-reloc;
189			gpio-offset = <0x30 9>;
190			mode-gpio;
191			direction = <PIN_INPUT>;
192		};
193
194		gpio_b10 {
195			u-boot,dm-pre-reloc;
196			gpio-offset = <0x30 10>;
197			mode-gpio;
198			direction = <PIN_INPUT>;
199		};
200
201		gpio_b11 {
202			u-boot,dm-pre-reloc;
203			gpio-offset = <0x30 11>;
204			mode-gpio;
205			direction = <PIN_INPUT>;
206		};
207
208		gpio_b25 {
209			gpio-offset = <0x30 25>;
210			mode-gpio;
211			direction = <PIN_INPUT>;
212		};
213
214		gpio_b28 {
215			gpio-offset = <0x30 28>;
216			mode-gpio;
217			direction = <PIN_OUTPUT>;
218			output-value = <1>;
219		};
220
221	};
222
223	pci {
224		compatible = "pci-x86";
225		#address-cells = <3>;
226		#size-cells = <2>;
227		u-boot,dm-pre-reloc;
228		ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
229			0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
230			0x01000000 0x0 0x1000 0x1000 0 0xefff>;
231
232		northbridge@0,0 {
233			reg = <0x00000000 0 0 0 0>;
234			u-boot,dm-pre-reloc;
235			compatible = "intel,bd82x6x-northbridge";
236			board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
237					<&gpio_b 11 0>, <&gpio_a 10 0>;
238			spd {
239				u-boot,dm-pre-reloc;
240				#address-cells = <1>;
241				#size-cells = <0>;
242				elpida_4Gb_1600_x16 {
243					u-boot,dm-pre-reloc;
244					reg = <0>;
245					data = [92 10 0b 03 04 19 02 02
246						03 52 01 08 0a 00 fe 00
247						69 78 69 3c 69 11 18 81
248						20 08 3c 3c 01 40 83 81
249						00 00 00 00 00 00 00 00
250						00 00 00 00 00 00 00 00
251						00 00 00 00 00 00 00 00
252						00 00 00 00 0f 11 42 00
253						00 00 00 00 00 00 00 00
254						00 00 00 00 00 00 00 00
255						00 00 00 00 00 00 00 00
256						00 00 00 00 00 00 00 00
257						00 00 00 00 00 00 00 00
258						00 00 00 00 00 00 00 00
259						00 00 00 00 00 02 fe 00
260						11 52 00 00 00 07 7f 37
261						45 42 4a 32 30 55 47 36
262						45 42 55 30 2d 47 4e 2d
263						46 20 30 20 02 fe 00 00
264						00 00 00 00 00 00 00 00
265						00 00 00 00 00 00 00 00
266						00 00 00 00 00 00 00 00
267						00 00 00 00 00 00 00 00
268						00 00 00 00 00 00 00 00
269						00 00 00 00 00 00 00 00
270						00 00 00 00 00 00 00 00
271						00 00 00 00 00 00 00 00
272						00 00 00 00 00 00 00 00
273						00 00 00 00 00 00 00 00
274						00 00 00 00 00 00 00 00
275						00 00 00 00 00 00 00 00
276						00 00 00 00 00 00 00 00];
277				};
278				samsung_4Gb_1600_1.35v_x16 {
279					u-boot,dm-pre-reloc;
280					reg = <1>;
281					data = [92 11 0b 03 04 19 02 02
282						03 11 01 08 0a 00 fe 00
283						69 78 69 3c 69 11 18 81
284						f0 0a 3c 3c 01 40 83 01
285						00 80 00 00 00 00 00 00
286						00 00 00 00 00 00 00 00
287						00 00 00 00 00 00 00 00
288						00 00 00 00 0f 11 02 00
289						00 00 00 00 00 00 00 00
290						00 00 00 00 00 00 00 00
291						00 00 00 00 00 00 00 00
292						00 00 00 00 00 00 00 00
293						00 00 00 00 00 00 00 00
294						00 00 00 00 00 00 00 00
295						00 00 00 00 00 80 ce 01
296						00 00 00 00 00 00 6a 04
297						4d 34 37 31 42 35 36 37
298						34 42 48 30 2d 59 4b 30
299						20 20 00 00 80 ce 00 00
300						00 00 00 00 00 00 00 00
301						00 00 00 00 00 00 00 00
302						00 00 00 00 00 00 00 00
303						00 00 00 00 00 00 00 00
304						00 00 00 00 00 00 00 00
305						00 00 00 00 00 00 00 00
306						00 00 00 00 00 00 00 00
307						00 00 00 00 00 00 00 00
308						00 00 00 00 00 00 00 00
309						00 00 00 00 00 00 00 00
310						00 00 00 00 00 00 00 00
311						00 00 00 00 00 00 00 00
312						00 00 00 00 00 00 00 00];
313					};
314				micron_4Gb_1600_1.35v_x16 {
315					reg = <2>;
316					data = [92 11 0b 03 04 19 02 02
317						03 11 01 08 0a 00 fe 00
318						69 78 69 3c 69 11 18 81
319						20 08 3c 3c 01 40 83 05
320						00 00 00 00 00 00 00 00
321						00 00 00 00 00 00 00 00
322						00 00 00 00 00 00 00 00
323						00 00 00 00 0f 01 02 00
324						00 00 00 00 00 00 00 00
325						00 00 00 00 00 00 00 00
326						00 00 00 00 00 00 00 00
327						00 00 00 00 00 00 00 00
328						00 00 00 00 00 00 00 00
329						00 00 00 00 00 00 00 00
330						00 00 00 00 00 80 2c 00
331						00 00 00 00 00 00 ad 75
332						34 4b 54 46 32 35 36 36
333						34 48 5a 2d 31 47 36 45
334						31 20 45 31 80 2c 00 00
335						00 00 00 00 00 00 00 00
336						00 00 00 00 00 00 00 00
337						00 00 00 00 00 00 00 00
338						ff ff ff ff ff ff ff ff
339						ff ff ff ff ff ff ff ff
340						ff ff ff ff ff ff ff ff
341						ff ff ff ff ff ff ff ff
342						ff ff ff ff ff ff ff ff
343						ff ff ff ff ff ff ff ff
344						ff ff ff ff ff ff ff ff
345						ff ff ff ff ff ff ff ff
346						ff ff ff ff ff ff ff ff
347						ff ff ff ff ff ff ff ff];
348				};
349			};
350		};
351
352		gma@2,0 {
353			reg = <0x00001000 0 0 0 0>;
354			compatible = "intel,gma";
355			intel,dp_hotplug = <0 0 0x06>;
356			intel,panel-port-select = <1>;
357			intel,panel-power-cycle-delay = <6>;
358			intel,panel-power-up-delay = <2000>;
359			intel,panel-power-down-delay = <500>;
360			intel,panel-power-backlight-on-delay = <2000>;
361			intel,panel-power-backlight-off-delay = <2000>;
362			intel,cpu-backlight = <0x00000200>;
363			intel,pch-backlight = <0x04000000>;
364		};
365
366		me@16,0 {
367			reg = <0x0000b000 0 0 0 0>;
368			compatible = "intel,me";
369			u-boot,dm-pre-reloc;
370		};
371
372		usb_1: usb@1a,0 {
373			reg = <0x0000d000 0 0 0 0>;
374			compatible = "ehci-pci";
375		};
376
377		hda@1b,0 {
378			reg = <0x0000d800 0 0 0 0>;
379			compatible = "intel,bd82x6x-hda";
380
381			/* These correspond to the Intel HDA specification */
382			beep-verbs = <
383				0x00170500	/* power up codec */
384				0x00270500	/* power up DAC */
385				0x00b70500	/* power up speaker */
386				0x00b70740	/* enable speaker out */
387				0x00b78d00	/* enable EAPD pin */
388				0x00b70c02	/* set EAPD pin */
389				0x0143b013>;	/* beep volume */
390
391			codecs {
392				creative_codec: creative-ca0132 {
393					vendor-id = <PCI_VENDOR_ID_CREATIVE>;
394					device-id = <PCI_DEVICE_ID_CREATIVE_CA01322>;
395				};
396				intel_hdmi: hdmi {
397					vendor-id = <PCI_VENDOR_ID_INTEL>;
398					device-id = <PCI_DEVICE_ID_INTEL_COUGARPOINT_HDMI>;
399				};
400			};
401		};
402
403		usb_0: usb@1d,0 {
404			reg = <0x0000e800 0 0 0 0>;
405			compatible = "ehci-pci";
406		};
407
408		pch@1f,0 {
409			reg = <0x0000f800 0 0 0 0>;
410			compatible = "intel,bd82x6x", "intel,pch9";
411			u-boot,dm-pre-reloc;
412			#address-cells = <1>;
413			#size-cells = <1>;
414			intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
415						0x80 0x80 0x80 0x80>;
416			intel,gpi-routing = <0 0 0 0 0 0 0 2
417						1 0 0 0 0 0 0 0>;
418			/* Enable EC SMI source */
419			intel,alt-gp-smi-enable = <0x0100>;
420
421			spi: spi {
422				#address-cells = <1>;
423				#size-cells = <0>;
424				compatible = "intel,ich9-spi";
425				u-boot,dm-pre-reloc;
426				spi-flash@0 {
427					#size-cells = <1>;
428					#address-cells = <1>;
429					u-boot,dm-pre-reloc;
430					reg = <0>;
431					compatible = "winbond,w25q64",
432							"spi-flash";
433					memory-map = <0xff800000 0x00800000>;
434					rw-mrc-cache {
435						label = "rw-mrc-cache";
436						reg = <0x003e0000 0x00010000>;
437						u-boot,dm-pre-reloc;
438					};
439				};
440			};
441
442			gpio_a: gpioa {
443				compatible = "intel,ich6-gpio";
444				u-boot,dm-pre-reloc;
445				#gpio-cells = <2>;
446				gpio-controller;
447				reg = <0 0x10>;
448				bank-name = "A";
449			};
450
451			gpio_b: gpiob {
452				compatible = "intel,ich6-gpio";
453				u-boot,dm-pre-reloc;
454				#gpio-cells = <2>;
455				gpio-controller;
456				reg = <0x30 0x10>;
457				bank-name = "B";
458			};
459
460			gpio_c: gpioc {
461				compatible = "intel,ich6-gpio";
462				u-boot,dm-pre-reloc;
463				#gpio-cells = <2>;
464				gpio-controller;
465				reg = <0x40 0x10>;
466				bank-name = "C";
467			};
468
469			lpc {
470				compatible = "intel,bd82x6x-lpc";
471				#address-cells = <1>;
472				#size-cells = <0>;
473				u-boot,dm-pre-reloc;
474				intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
475				cros-ec@200 {
476					compatible = "google,cros-ec";
477					reg = <0x204 1 0x200 1 0x880 0x80>;
478
479					/*
480					 * Describes the flash memory within
481					 * the EC
482					 */
483					#address-cells = <1>;
484					#size-cells = <1>;
485					flash@8000000 {
486						reg = <0x08000000 0x20000>;
487						erase-value = <0xff>;
488					};
489				};
490			};
491		};
492
493		sata@1f,2 {
494			compatible = "intel,pantherpoint-ahci";
495			reg = <0x0000fa00 0 0 0 0>;
496			u-boot,dm-pre-reloc;
497			intel,sata-mode = "ahci";
498			intel,sata-port-map = <1>;
499			intel,sata-port0-gen3-tx = <0x00880a7f>;
500		};
501
502		smbus: smbus@1f,3 {
503			compatible = "intel,ich-i2c";
504			reg = <0x0000fb00 0 0 0 0>;
505			u-boot,dm-pre-reloc;
506		};
507	};
508
509	tpm {
510		reg = <0xfed40000 0x5000>;
511		compatible = "infineon,slb9635lpc";
512	};
513
514	microcode {
515		u-boot,dm-pre-reloc;
516		update@0 {
517			u-boot,dm-pre-reloc;
518#include "microcode/m12306a9_0000001b.dtsi"
519		};
520	};
521
522};
523
524&creative_codec {
525	verbs =  <
526		/**
527		 * Malcolm Setup. These correspond to the Intel HDA
528		 * specification.
529		 */
530		0x01570d09 0x01570c23 0x01570a01 0x01570df0
531		0x01570efe 0x01570775 0x015707d3 0x01570709
532		0x01570753 0x015707d4 0x015707ef 0x01570775
533		0x015707d3 0x01570709 0x01570702 0x01570737
534		0x01570778 0x01553cce 0x015575c9 0x01553dce
535		0x0155b7c9 0x01570de8 0x01570efe 0x01570702
536		0x01570768 0x01570762 0x01553ace 0x015546c9
537		0x01553bce 0x0155e8c9 0x01570d49 0x01570c88
538		0x01570d20 0x01570e19 0x01570700 0x01571a05
539		0x01571b29 0x01571a04 0x01571b29 0x01570a01
540
541		/* Pin Widget Verb Table */
542
543		/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x144dc0c2 */
544		AZALIA_SUBVENDOR(0x0, 0x144dc0c2)
545
546		/*
547		 * Pin Complex (NID 0x0B)  Port-G Analog Unknown
548		 * Speaker at Int N/A
549		 */
550		AZALIA_PIN_CFG(0x0, 0x0b, 0x901700f0)
551
552		/* Pin Complex (NID 0x0C)  N/C */
553		AZALIA_PIN_CFG(0x0, 0x0c, 0x70f000f0)
554
555		/* Pin Complex (NID 0x0D)  N/C */
556		AZALIA_PIN_CFG(0x0, 0x0d, 0x70f000f0)
557
558		/* Pin Complex (NID 0x0E)  N/C */
559		AZALIA_PIN_CFG(0x0, 0x0e, 0x70f000f0)
560
561		/* Pin Complex (NID 0x0F)  N/C */
562		AZALIA_PIN_CFG(0x0, 0x0f, 0x70f000f0)
563
564		/* Pin Complex (NID 0x10) Port-D 1/8 Black HP Out at Ext Left */
565		AZALIA_PIN_CFG(0x0, 0x10, 0x032110f0)
566
567		/* Pin Complex (NID 0x11) Port-B Click Mic */
568		AZALIA_PIN_CFG(0x0, 0x11, 0x90a700f0)
569
570		/* Pin Complex (NID 0x12) Port-C Combo Jack Mic or D-Mic */
571		AZALIA_PIN_CFG(0x0, 0x12, 0x03a110f0)
572
573		/* Pin Complex (NID 0x13) What you hear */
574		AZALIA_PIN_CFG(0x0, 0x13, 0x90d600f0)>;
575};
576
577&intel_hdmi {
578	verbs = <
579		/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
580		AZALIA_SUBVENDOR(0x3, 0x80860101)
581
582		/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
583		AZALIA_PIN_CFG(0x3, 0x05, 0x18560010)
584
585		/* Pin Complex (NID 0x06) Digital Out at Int HDMI */
586		AZALIA_PIN_CFG(0x3, 0x06, 0x18560020)
587
588		/* Pin Complex (NID 0x07) Digital Out at Int HDMI */
589		AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)>;
590};
591