1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
5
6/ {
7	model = "Google Link";
8	compatible = "google,link", "intel,celeron-ivybridge";
9
10	aliases {
11		spi0 = "/pci/pch/spi";
12	};
13
14	config {
15	       silent_console = <0>;
16	};
17
18	gpioa {
19		compatible = "intel,ich6-gpio";
20		u-boot,dm-pre-reloc;
21		reg = <0 0x10>;
22		bank-name = "A";
23	};
24
25	gpiob {
26		compatible = "intel,ich6-gpio";
27		u-boot,dm-pre-reloc;
28		reg = <0x30 0x10>;
29		bank-name = "B";
30	};
31
32	gpioc {
33		compatible = "intel,ich6-gpio";
34		u-boot,dm-pre-reloc;
35		reg = <0x40 0x10>;
36		bank-name = "C";
37	};
38
39	chosen {
40		stdout-path = "/serial";
41	};
42
43	spd {
44		compatible = "memory-spd";
45		#address-cells = <1>;
46		#size-cells = <0>;
47		elpida_4Gb_1600_x16 {
48			reg = <0>;
49			data = [92 10 0b 03 04 19 02 02
50				03 52 01 08 0a 00 fe 00
51				69 78 69 3c 69 11 18 81
52				20 08 3c 3c 01 40 83 81
53				00 00 00 00 00 00 00 00
54				00 00 00 00 00 00 00 00
55				00 00 00 00 00 00 00 00
56				00 00 00 00 0f 11 42 00
57				00 00 00 00 00 00 00 00
58				00 00 00 00 00 00 00 00
59				00 00 00 00 00 00 00 00
60				00 00 00 00 00 00 00 00
61				00 00 00 00 00 00 00 00
62				00 00 00 00 00 00 00 00
63				00 00 00 00 00 02 fe 00
64				11 52 00 00 00 07 7f 37
65				45 42 4a 32 30 55 47 36
66				45 42 55 30 2d 47 4e 2d
67				46 20 30 20 02 fe 00 00
68				00 00 00 00 00 00 00 00
69				00 00 00 00 00 00 00 00
70				00 00 00 00 00 00 00 00
71				00 00 00 00 00 00 00 00
72				00 00 00 00 00 00 00 00
73				00 00 00 00 00 00 00 00
74				00 00 00 00 00 00 00 00
75				00 00 00 00 00 00 00 00
76				00 00 00 00 00 00 00 00
77				00 00 00 00 00 00 00 00
78				00 00 00 00 00 00 00 00
79				00 00 00 00 00 00 00 00
80				00 00 00 00 00 00 00 00];
81		};
82		samsung_4Gb_1600_1.35v_x16 {
83			reg = <1>;
84			data = [92 11 0b 03 04 19 02 02
85				03 11 01 08 0a 00 fe 00
86				69 78 69 3c 69 11 18 81
87				f0 0a 3c 3c 01 40 83 01
88				00 80 00 00 00 00 00 00
89				00 00 00 00 00 00 00 00
90				00 00 00 00 00 00 00 00
91				00 00 00 00 0f 11 02 00
92				00 00 00 00 00 00 00 00
93				00 00 00 00 00 00 00 00
94				00 00 00 00 00 00 00 00
95				00 00 00 00 00 00 00 00
96				00 00 00 00 00 00 00 00
97				00 00 00 00 00 00 00 00
98				00 00 00 00 00 80 ce 01
99				00 00 00 00 00 00 6a 04
100				4d 34 37 31 42 35 36 37
101				34 42 48 30 2d 59 4b 30
102				20 20 00 00 80 ce 00 00
103				00 00 00 00 00 00 00 00
104				00 00 00 00 00 00 00 00
105				00 00 00 00 00 00 00 00
106				00 00 00 00 00 00 00 00
107				00 00 00 00 00 00 00 00
108				00 00 00 00 00 00 00 00
109				00 00 00 00 00 00 00 00
110				00 00 00 00 00 00 00 00
111				00 00 00 00 00 00 00 00
112				00 00 00 00 00 00 00 00
113				00 00 00 00 00 00 00 00
114				00 00 00 00 00 00 00 00
115				00 00 00 00 00 00 00 00];
116			};
117		micron_4Gb_1600_1.35v_x16 {
118			reg = <2>;
119			data = [92 11 0b 03 04 19 02 02
120				03 11 01 08 0a 00 fe 00
121				69 78 69 3c 69 11 18 81
122				20 08 3c 3c 01 40 83 05
123				00 00 00 00 00 00 00 00
124				00 00 00 00 00 00 00 00
125				00 00 00 00 00 00 00 00
126				00 00 00 00 0f 01 02 00
127				00 00 00 00 00 00 00 00
128				00 00 00 00 00 00 00 00
129				00 00 00 00 00 00 00 00
130				00 00 00 00 00 00 00 00
131				00 00 00 00 00 00 00 00
132				00 00 00 00 00 00 00 00
133				00 00 00 00 00 80 2c 00
134				00 00 00 00 00 00 ad 75
135				34 4b 54 46 32 35 36 36
136				34 48 5a 2d 31 47 36 45
137				31 20 45 31 80 2c 00 00
138				00 00 00 00 00 00 00 00
139				00 00 00 00 00 00 00 00
140				00 00 00 00 00 00 00 00
141				ff ff ff ff ff ff ff ff
142				ff ff ff ff ff ff ff ff
143				ff ff ff ff ff ff ff ff
144				ff ff ff ff ff ff ff ff
145				ff ff ff ff ff ff ff ff
146				ff ff ff ff ff ff ff ff
147				ff ff ff ff ff ff ff ff
148				ff ff ff ff ff ff ff ff
149				ff ff ff ff ff ff ff ff
150				ff ff ff ff ff ff ff ff];
151		};
152	};
153
154	pci {
155		compatible = "intel,pci-ivybridge", "pci-x86";
156		#address-cells = <3>;
157		#size-cells = <2>;
158		u-boot,dm-pre-reloc;
159		ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
160			0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
161			0x01000000 0x0 0x1000 0x1000 0 0xefff>;
162		sata {
163			compatible = "intel,pantherpoint-ahci";
164			intel,sata-mode = "ahci";
165			intel,sata-port-map = <1>;
166			intel,sata-port0-gen3-tx = <0x00880a7f>;
167		};
168
169		gma {
170			compatible = "intel,gma";
171			intel,dp_hotplug = <0 0 0x06>;
172			intel,panel-port-select = <1>;
173			intel,panel-power-cycle-delay = <6>;
174			intel,panel-power-up-delay = <2000>;
175			intel,panel-power-down-delay = <500>;
176			intel,panel-power-backlight-on-delay = <2000>;
177			intel,panel-power-backlight-off-delay = <2000>;
178			intel,cpu-backlight = <0x00000200>;
179			intel,pch-backlight = <0x04000000>;
180		};
181
182		pch {
183			reg = <0x0000f800 0 0 0 0>;
184			compatible = "intel,bd82x6x", "intel,pch";
185			u-boot,dm-pre-reloc;
186			#address-cells = <1>;
187			#size-cells = <1>;
188			gen-dec = <0x800 0xfc 0x900 0xfc>;
189			intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
190			intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
191						0x80 0x80 0x80 0x80>;
192			intel,gpi-routing = <0 0 0 0 0 0 0 2
193						1 0 0 0 0 0 0 0>;
194			/* Enable EC SMI source */
195			intel,alt-gp-smi-enable = <0x0100>;
196			spi {
197				#address-cells = <1>;
198				#size-cells = <0>;
199				compatible = "intel,ich-spi";
200				spi-flash@0 {
201					#size-cells = <1>;
202					#address-cells = <1>;
203					reg = <0>;
204					compatible = "winbond,w25q64",
205							"spi-flash";
206					memory-map = <0xff800000 0x00800000>;
207					rw-mrc-cache {
208						label = "rw-mrc-cache";
209						reg = <0x003e0000 0x00010000>;
210						type = "wiped";
211						wipe-value = [ff];
212					};
213				};
214			};
215
216			lpc {
217				compatible = "intel,bd82x6x-lpc";
218				#address-cells = <1>;
219				#size-cells = <0>;
220				cros-ec@200 {
221					compatible = "google,cros-ec";
222					reg = <0x204 1 0x200 1 0x880 0x80>;
223
224					/*
225					 * Describes the flash memory within
226					 * the EC
227					 */
228					#address-cells = <1>;
229					#size-cells = <1>;
230					flash@8000000 {
231						reg = <0x08000000 0x20000>;
232						erase-value = <0xff>;
233					};
234				};
235			};
236		};
237	};
238
239	microcode {
240		update@0 {
241#include "microcode/m12306a9_0000001b.dtsi"
242		};
243	};
244
245};
246