xref: /openbmc/u-boot/arch/x86/dts/chromebook_link.dts (revision 49413ea3f5b05079c11d284a8520da2bc421442e) 
1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
5
6/ {
7	model = "Google Link";
8	compatible = "google,link", "intel,celeron-ivybridge";
9
10	config {
11	       silent_console = <0>;
12	};
13
14	gpioa {
15		compatible = "intel,ich6-gpio";
16		u-boot,dm-pre-reloc;
17		reg = <0 0x10>;
18		bank-name = "A";
19	};
20
21	gpiob {
22		compatible = "intel,ich6-gpio";
23		u-boot,dm-pre-reloc;
24		reg = <0x30 0x10>;
25		bank-name = "B";
26	};
27
28	gpioc {
29		compatible = "intel,ich6-gpio";
30		u-boot,dm-pre-reloc;
31		reg = <0x40 0x10>;
32		bank-name = "C";
33	};
34
35	chosen {
36		stdout-path = "/serial";
37	};
38
39	spd {
40		compatible = "memory-spd";
41		#address-cells = <1>;
42		#size-cells = <0>;
43		elpida_4Gb_1600_x16 {
44			reg = <0>;
45			data = [92 10 0b 03 04 19 02 02
46				03 52 01 08 0a 00 fe 00
47				69 78 69 3c 69 11 18 81
48				20 08 3c 3c 01 40 83 81
49				00 00 00 00 00 00 00 00
50				00 00 00 00 00 00 00 00
51				00 00 00 00 00 00 00 00
52				00 00 00 00 0f 11 42 00
53				00 00 00 00 00 00 00 00
54				00 00 00 00 00 00 00 00
55				00 00 00 00 00 00 00 00
56				00 00 00 00 00 00 00 00
57				00 00 00 00 00 00 00 00
58				00 00 00 00 00 00 00 00
59				00 00 00 00 00 02 fe 00
60				11 52 00 00 00 07 7f 37
61				45 42 4a 32 30 55 47 36
62				45 42 55 30 2d 47 4e 2d
63				46 20 30 20 02 fe 00 00
64				00 00 00 00 00 00 00 00
65				00 00 00 00 00 00 00 00
66				00 00 00 00 00 00 00 00
67				00 00 00 00 00 00 00 00
68				00 00 00 00 00 00 00 00
69				00 00 00 00 00 00 00 00
70				00 00 00 00 00 00 00 00
71				00 00 00 00 00 00 00 00
72				00 00 00 00 00 00 00 00
73				00 00 00 00 00 00 00 00
74				00 00 00 00 00 00 00 00
75				00 00 00 00 00 00 00 00
76				00 00 00 00 00 00 00 00];
77		};
78		samsung_4Gb_1600_1.35v_x16 {
79			reg = <1>;
80			data = [92 11 0b 03 04 19 02 02
81				03 11 01 08 0a 00 fe 00
82				69 78 69 3c 69 11 18 81
83				f0 0a 3c 3c 01 40 83 01
84				00 80 00 00 00 00 00 00
85				00 00 00 00 00 00 00 00
86				00 00 00 00 00 00 00 00
87				00 00 00 00 0f 11 02 00
88				00 00 00 00 00 00 00 00
89				00 00 00 00 00 00 00 00
90				00 00 00 00 00 00 00 00
91				00 00 00 00 00 00 00 00
92				00 00 00 00 00 00 00 00
93				00 00 00 00 00 00 00 00
94				00 00 00 00 00 80 ce 01
95				00 00 00 00 00 00 6a 04
96				4d 34 37 31 42 35 36 37
97				34 42 48 30 2d 59 4b 30
98				20 20 00 00 80 ce 00 00
99				00 00 00 00 00 00 00 00
100				00 00 00 00 00 00 00 00
101				00 00 00 00 00 00 00 00
102				00 00 00 00 00 00 00 00
103				00 00 00 00 00 00 00 00
104				00 00 00 00 00 00 00 00
105				00 00 00 00 00 00 00 00
106				00 00 00 00 00 00 00 00
107				00 00 00 00 00 00 00 00
108				00 00 00 00 00 00 00 00
109				00 00 00 00 00 00 00 00
110				00 00 00 00 00 00 00 00
111				00 00 00 00 00 00 00 00];
112			};
113		micron_4Gb_1600_1.35v_x16 {
114			reg = <2>;
115			data = [92 11 0b 03 04 19 02 02
116				03 11 01 08 0a 00 fe 00
117				69 78 69 3c 69 11 18 81
118				20 08 3c 3c 01 40 83 05
119				00 00 00 00 00 00 00 00
120				00 00 00 00 00 00 00 00
121				00 00 00 00 00 00 00 00
122				00 00 00 00 0f 01 02 00
123				00 00 00 00 00 00 00 00
124				00 00 00 00 00 00 00 00
125				00 00 00 00 00 00 00 00
126				00 00 00 00 00 00 00 00
127				00 00 00 00 00 00 00 00
128				00 00 00 00 00 00 00 00
129				00 00 00 00 00 80 2c 00
130				00 00 00 00 00 00 ad 75
131				34 4b 54 46 32 35 36 36
132				34 48 5a 2d 31 47 36 45
133				31 20 45 31 80 2c 00 00
134				00 00 00 00 00 00 00 00
135				00 00 00 00 00 00 00 00
136				00 00 00 00 00 00 00 00
137				ff ff ff ff ff ff ff ff
138				ff ff ff ff ff ff ff ff
139				ff ff ff ff ff ff ff ff
140				ff ff ff ff ff ff ff ff
141				ff ff ff ff ff ff ff ff
142				ff ff ff ff ff ff ff ff
143				ff ff ff ff ff ff ff ff
144				ff ff ff ff ff ff ff ff
145				ff ff ff ff ff ff ff ff
146				ff ff ff ff ff ff ff ff];
147		};
148	};
149
150	spi {
151		#address-cells = <1>;
152		#size-cells = <0>;
153		compatible = "intel,ich9";
154		spi-flash@0 {
155			reg = <0>;
156			compatible = "winbond,w25q64", "spi-flash";
157			memory-map = <0xff800000 0x00800000>;
158		};
159	};
160
161	pci {
162		sata {
163			compatible = "intel,pantherpoint-ahci";
164			intel,sata-mode = "ahci";
165			intel,sata-port-map = <1>;
166			intel,sata-port0-gen3-tx = <0x00880a7f>;
167		};
168
169		gma {
170			compatible = "intel,gma";
171			intel,dp_hotplug = <0 0 0x06>;
172			intel,panel-port-select = <1>;
173			intel,panel-power-cycle-delay = <6>;
174			intel,panel-power-up-delay = <2000>;
175			intel,panel-power-down-delay = <500>;
176			intel,panel-power-backlight-on-delay = <2000>;
177			intel,panel-power-backlight-off-delay = <2000>;
178			intel,cpu-backlight = <0x00000200>;
179			intel,pch-backlight = <0x04000000>;
180		};
181
182		lpc {
183			compatible = "intel,lpc";
184			#address-cells = <1>;
185			#size-cells = <1>;
186			gen-dec = <0x800 0xfc 0x900 0xfc>;
187			intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
188			intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
189						0x80 0x80 0x80 0x80>;
190			intel,gpi-routing = <0 0 0 0 0 0 0 2
191						1 0 0 0 0 0 0 0>;
192			/* Enable EC SMI source */
193			intel,alt-gp-smi-enable = <0x0100>;
194
195			cros-ec@200 {
196				compatible = "google,cros-ec";
197				reg = <0x204 1 0x200 1 0x880 0x80>;
198
199				/* Describes the flash memory within the EC */
200				#address-cells = <1>;
201				#size-cells = <1>;
202				flash@8000000 {
203					reg = <0x08000000 0x20000>;
204					erase-value = <0xff>;
205				};
206			};
207		};
208	};
209
210	microcode {
211		update@0 {
212#include "microcode/m12306a9_0000001b.dtsi"
213		};
214	};
215
216};
217