1ade8127aSBin Meng/dts-v1/; 2ade8127aSBin Meng 3ade8127aSBin Meng/include/ "skeleton.dtsi" 46b44ae6bSSimon Glass/include/ "keyboard.dtsi" 5ade8127aSBin Meng/include/ "serial.dtsi" 693f8a311SBin Meng/include/ "rtc.dtsi" 780af3984SBin Meng/include/ "tsc_timer.dtsi" 8ade8127aSBin Meng 9ade8127aSBin Meng/ { 10ade8127aSBin Meng model = "Google Link"; 11ade8127aSBin Meng compatible = "google,link", "intel,celeron-ivybridge"; 12ade8127aSBin Meng 13a9aff2f4SSimon Glass aliases { 1490b16d14SSimon Glass spi0 = "/pci/pch/spi"; 15a9aff2f4SSimon Glass }; 16a9aff2f4SSimon Glass 17ade8127aSBin Meng config { 18ade8127aSBin Meng silent_console = <0>; 19ade8127aSBin Meng }; 20ade8127aSBin Meng 21ade8127aSBin Meng gpioa { 22ade8127aSBin Meng compatible = "intel,ich6-gpio"; 23ade8127aSBin Meng u-boot,dm-pre-reloc; 24ade8127aSBin Meng reg = <0 0x10>; 25ade8127aSBin Meng bank-name = "A"; 26ade8127aSBin Meng }; 27ade8127aSBin Meng 28ade8127aSBin Meng gpiob { 29ade8127aSBin Meng compatible = "intel,ich6-gpio"; 30ade8127aSBin Meng u-boot,dm-pre-reloc; 31ade8127aSBin Meng reg = <0x30 0x10>; 32ade8127aSBin Meng bank-name = "B"; 33ade8127aSBin Meng }; 34ade8127aSBin Meng 35ade8127aSBin Meng gpioc { 36ade8127aSBin Meng compatible = "intel,ich6-gpio"; 37ade8127aSBin Meng u-boot,dm-pre-reloc; 38ade8127aSBin Meng reg = <0x40 0x10>; 39ade8127aSBin Meng bank-name = "C"; 40ade8127aSBin Meng }; 41ade8127aSBin Meng 42ade8127aSBin Meng chosen { 43ade8127aSBin Meng stdout-path = "/serial"; 44ade8127aSBin Meng }; 45ade8127aSBin Meng 466b44ae6bSSimon Glass keyboard { 476b44ae6bSSimon Glass intel,duplicate-por; 486b44ae6bSSimon Glass }; 496b44ae6bSSimon Glass 50ade8127aSBin Meng spd { 51ade8127aSBin Meng compatible = "memory-spd"; 52ade8127aSBin Meng #address-cells = <1>; 53ade8127aSBin Meng #size-cells = <0>; 54ade8127aSBin Meng elpida_4Gb_1600_x16 { 55ade8127aSBin Meng reg = <0>; 56ade8127aSBin Meng data = [92 10 0b 03 04 19 02 02 57ade8127aSBin Meng 03 52 01 08 0a 00 fe 00 58ade8127aSBin Meng 69 78 69 3c 69 11 18 81 59ade8127aSBin Meng 20 08 3c 3c 01 40 83 81 60ade8127aSBin Meng 00 00 00 00 00 00 00 00 61ade8127aSBin Meng 00 00 00 00 00 00 00 00 62ade8127aSBin Meng 00 00 00 00 00 00 00 00 63ade8127aSBin Meng 00 00 00 00 0f 11 42 00 64ade8127aSBin Meng 00 00 00 00 00 00 00 00 65ade8127aSBin Meng 00 00 00 00 00 00 00 00 66ade8127aSBin Meng 00 00 00 00 00 00 00 00 67ade8127aSBin Meng 00 00 00 00 00 00 00 00 68ade8127aSBin Meng 00 00 00 00 00 00 00 00 69ade8127aSBin Meng 00 00 00 00 00 00 00 00 70ade8127aSBin Meng 00 00 00 00 00 02 fe 00 71ade8127aSBin Meng 11 52 00 00 00 07 7f 37 72ade8127aSBin Meng 45 42 4a 32 30 55 47 36 73ade8127aSBin Meng 45 42 55 30 2d 47 4e 2d 74ade8127aSBin Meng 46 20 30 20 02 fe 00 00 75ade8127aSBin Meng 00 00 00 00 00 00 00 00 76ade8127aSBin Meng 00 00 00 00 00 00 00 00 77ade8127aSBin Meng 00 00 00 00 00 00 00 00 78ade8127aSBin Meng 00 00 00 00 00 00 00 00 79ade8127aSBin Meng 00 00 00 00 00 00 00 00 80ade8127aSBin Meng 00 00 00 00 00 00 00 00 81ade8127aSBin Meng 00 00 00 00 00 00 00 00 82ade8127aSBin Meng 00 00 00 00 00 00 00 00 83ade8127aSBin Meng 00 00 00 00 00 00 00 00 84ade8127aSBin Meng 00 00 00 00 00 00 00 00 85ade8127aSBin Meng 00 00 00 00 00 00 00 00 86ade8127aSBin Meng 00 00 00 00 00 00 00 00 87ade8127aSBin Meng 00 00 00 00 00 00 00 00]; 88ade8127aSBin Meng }; 89ade8127aSBin Meng samsung_4Gb_1600_1.35v_x16 { 90ade8127aSBin Meng reg = <1>; 91ade8127aSBin Meng data = [92 11 0b 03 04 19 02 02 92ade8127aSBin Meng 03 11 01 08 0a 00 fe 00 93ade8127aSBin Meng 69 78 69 3c 69 11 18 81 94ade8127aSBin Meng f0 0a 3c 3c 01 40 83 01 95ade8127aSBin Meng 00 80 00 00 00 00 00 00 96ade8127aSBin Meng 00 00 00 00 00 00 00 00 97ade8127aSBin Meng 00 00 00 00 00 00 00 00 98ade8127aSBin Meng 00 00 00 00 0f 11 02 00 99ade8127aSBin Meng 00 00 00 00 00 00 00 00 100ade8127aSBin Meng 00 00 00 00 00 00 00 00 101ade8127aSBin Meng 00 00 00 00 00 00 00 00 102ade8127aSBin Meng 00 00 00 00 00 00 00 00 103ade8127aSBin Meng 00 00 00 00 00 00 00 00 104ade8127aSBin Meng 00 00 00 00 00 00 00 00 105ade8127aSBin Meng 00 00 00 00 00 80 ce 01 106ade8127aSBin Meng 00 00 00 00 00 00 6a 04 107ade8127aSBin Meng 4d 34 37 31 42 35 36 37 108ade8127aSBin Meng 34 42 48 30 2d 59 4b 30 109ade8127aSBin Meng 20 20 00 00 80 ce 00 00 110ade8127aSBin Meng 00 00 00 00 00 00 00 00 111ade8127aSBin Meng 00 00 00 00 00 00 00 00 112ade8127aSBin Meng 00 00 00 00 00 00 00 00 113ade8127aSBin Meng 00 00 00 00 00 00 00 00 114ade8127aSBin Meng 00 00 00 00 00 00 00 00 115ade8127aSBin Meng 00 00 00 00 00 00 00 00 116ade8127aSBin Meng 00 00 00 00 00 00 00 00 117ade8127aSBin Meng 00 00 00 00 00 00 00 00 118ade8127aSBin Meng 00 00 00 00 00 00 00 00 119ade8127aSBin Meng 00 00 00 00 00 00 00 00 120ade8127aSBin Meng 00 00 00 00 00 00 00 00 121ade8127aSBin Meng 00 00 00 00 00 00 00 00 122ade8127aSBin Meng 00 00 00 00 00 00 00 00]; 123ade8127aSBin Meng }; 124ade8127aSBin Meng micron_4Gb_1600_1.35v_x16 { 125ade8127aSBin Meng reg = <2>; 126ade8127aSBin Meng data = [92 11 0b 03 04 19 02 02 127ade8127aSBin Meng 03 11 01 08 0a 00 fe 00 128ade8127aSBin Meng 69 78 69 3c 69 11 18 81 129ade8127aSBin Meng 20 08 3c 3c 01 40 83 05 130ade8127aSBin Meng 00 00 00 00 00 00 00 00 131ade8127aSBin Meng 00 00 00 00 00 00 00 00 132ade8127aSBin Meng 00 00 00 00 00 00 00 00 133ade8127aSBin Meng 00 00 00 00 0f 01 02 00 134ade8127aSBin Meng 00 00 00 00 00 00 00 00 135ade8127aSBin Meng 00 00 00 00 00 00 00 00 136ade8127aSBin Meng 00 00 00 00 00 00 00 00 137ade8127aSBin Meng 00 00 00 00 00 00 00 00 138ade8127aSBin Meng 00 00 00 00 00 00 00 00 139ade8127aSBin Meng 00 00 00 00 00 00 00 00 140ade8127aSBin Meng 00 00 00 00 00 80 2c 00 141ade8127aSBin Meng 00 00 00 00 00 00 ad 75 142ade8127aSBin Meng 34 4b 54 46 32 35 36 36 143ade8127aSBin Meng 34 48 5a 2d 31 47 36 45 144ade8127aSBin Meng 31 20 45 31 80 2c 00 00 145ade8127aSBin Meng 00 00 00 00 00 00 00 00 146ade8127aSBin Meng 00 00 00 00 00 00 00 00 147ade8127aSBin Meng 00 00 00 00 00 00 00 00 148ade8127aSBin Meng ff ff ff ff ff ff ff ff 149ade8127aSBin Meng ff ff ff ff ff ff ff ff 150ade8127aSBin Meng ff ff ff ff ff ff ff ff 151ade8127aSBin Meng ff ff ff ff ff ff ff ff 152ade8127aSBin Meng ff ff ff ff ff ff ff ff 153ade8127aSBin Meng ff ff ff ff ff ff ff ff 154ade8127aSBin Meng ff ff ff ff ff ff ff ff 155ade8127aSBin Meng ff ff ff ff ff ff ff ff 156ade8127aSBin Meng ff ff ff ff ff ff ff ff 157ade8127aSBin Meng ff ff ff ff ff ff ff ff]; 158ade8127aSBin Meng }; 159ade8127aSBin Meng }; 160ade8127aSBin Meng 161ade8127aSBin Meng pci { 162801f4f1bSSimon Glass compatible = "intel,pci-ivybridge", "pci-x86"; 163801f4f1bSSimon Glass #address-cells = <3>; 164801f4f1bSSimon Glass #size-cells = <2>; 165801f4f1bSSimon Glass u-boot,dm-pre-reloc; 166801f4f1bSSimon Glass ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 167801f4f1bSSimon Glass 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 168801f4f1bSSimon Glass 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 169ade8127aSBin Meng sata { 170ade8127aSBin Meng compatible = "intel,pantherpoint-ahci"; 171ade8127aSBin Meng intel,sata-mode = "ahci"; 172ade8127aSBin Meng intel,sata-port-map = <1>; 173ade8127aSBin Meng intel,sata-port0-gen3-tx = <0x00880a7f>; 174ade8127aSBin Meng }; 175ade8127aSBin Meng 176ade8127aSBin Meng gma { 177ade8127aSBin Meng compatible = "intel,gma"; 178ade8127aSBin Meng intel,dp_hotplug = <0 0 0x06>; 179ade8127aSBin Meng intel,panel-port-select = <1>; 180ade8127aSBin Meng intel,panel-power-cycle-delay = <6>; 181ade8127aSBin Meng intel,panel-power-up-delay = <2000>; 182ade8127aSBin Meng intel,panel-power-down-delay = <500>; 183ade8127aSBin Meng intel,panel-power-backlight-on-delay = <2000>; 184ade8127aSBin Meng intel,panel-power-backlight-off-delay = <2000>; 185ade8127aSBin Meng intel,cpu-backlight = <0x00000200>; 186ade8127aSBin Meng intel,pch-backlight = <0x04000000>; 187ade8127aSBin Meng }; 188ade8127aSBin Meng 189*f2b85ab5SSimon Glass pch@1f,0 { 190aad78d27SSimon Glass reg = <0x0000f800 0 0 0 0>; 191*f2b85ab5SSimon Glass compatible = "intel,bd82x6x", "intel,pch9"; 19290b16d14SSimon Glass u-boot,dm-pre-reloc; 193ade8127aSBin Meng #address-cells = <1>; 194ade8127aSBin Meng #size-cells = <1>; 195ade8127aSBin Meng gen-dec = <0x800 0xfc 0x900 0xfc>; 196ade8127aSBin Meng intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 197ade8127aSBin Meng intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 198ade8127aSBin Meng 0x80 0x80 0x80 0x80>; 199ade8127aSBin Meng intel,gpi-routing = <0 0 0 0 0 0 0 2 200ade8127aSBin Meng 1 0 0 0 0 0 0 0>; 201ade8127aSBin Meng /* Enable EC SMI source */ 202ade8127aSBin Meng intel,alt-gp-smi-enable = <0x0100>; 203*f2b85ab5SSimon Glass 20490b16d14SSimon Glass spi { 20590b16d14SSimon Glass #address-cells = <1>; 20690b16d14SSimon Glass #size-cells = <0>; 20790b16d14SSimon Glass compatible = "intel,ich-spi"; 20890b16d14SSimon Glass spi-flash@0 { 20990b16d14SSimon Glass #size-cells = <1>; 21090b16d14SSimon Glass #address-cells = <1>; 21190b16d14SSimon Glass reg = <0>; 21290b16d14SSimon Glass compatible = "winbond,w25q64", 21390b16d14SSimon Glass "spi-flash"; 21490b16d14SSimon Glass memory-map = <0xff800000 0x00800000>; 21590b16d14SSimon Glass rw-mrc-cache { 21690b16d14SSimon Glass label = "rw-mrc-cache"; 21790b16d14SSimon Glass reg = <0x003e0000 0x00010000>; 21890b16d14SSimon Glass }; 21990b16d14SSimon Glass }; 22090b16d14SSimon Glass }; 221ade8127aSBin Meng 22290b16d14SSimon Glass lpc { 22390b16d14SSimon Glass compatible = "intel,bd82x6x-lpc"; 22490b16d14SSimon Glass #address-cells = <1>; 22590b16d14SSimon Glass #size-cells = <0>; 226ade8127aSBin Meng cros-ec@200 { 227ade8127aSBin Meng compatible = "google,cros-ec"; 228ade8127aSBin Meng reg = <0x204 1 0x200 1 0x880 0x80>; 229ade8127aSBin Meng 23090b16d14SSimon Glass /* 23190b16d14SSimon Glass * Describes the flash memory within 23290b16d14SSimon Glass * the EC 23390b16d14SSimon Glass */ 234ade8127aSBin Meng #address-cells = <1>; 235ade8127aSBin Meng #size-cells = <1>; 236ade8127aSBin Meng flash@8000000 { 237ade8127aSBin Meng reg = <0x08000000 0x20000>; 238ade8127aSBin Meng erase-value = <0xff>; 239ade8127aSBin Meng }; 240ade8127aSBin Meng }; 241ade8127aSBin Meng }; 242ade8127aSBin Meng }; 24390b16d14SSimon Glass }; 244ade8127aSBin Meng 2456e474eabSSimon Glass tpm { 2466e474eabSSimon Glass reg = <0xfed40000 0x5000>; 2476e474eabSSimon Glass compatible = "infineon,slb9635lpc"; 2486e474eabSSimon Glass }; 2496e474eabSSimon Glass 250ade8127aSBin Meng microcode { 251ade8127aSBin Meng update@0 { 252ade8127aSBin Meng#include "microcode/m12306a9_0000001b.dtsi" 253ade8127aSBin Meng }; 254ade8127aSBin Meng }; 255ade8127aSBin Meng 256ade8127aSBin Meng}; 257