xref: /openbmc/u-boot/arch/x86/cpu/queensbay/tnc.c (revision 32c1a6ee)
1 /*
2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/irq.h>
10 #include <asm/pci.h>
11 #include <asm/post.h>
12 #include <asm/arch/device.h>
13 #include <asm/arch/tnc.h>
14 #include <asm/fsp/fsp_support.h>
15 #include <asm/processor.h>
16 
17 static void unprotect_spi_flash(void)
18 {
19 	u32 bc;
20 
21 	bc = x86_pci_read_config32(TNC_LPC, 0xd8);
22 	bc |= 0x1;	/* unprotect the flash */
23 	x86_pci_write_config32(TNC_LPC, 0xd8, bc);
24 }
25 
26 static void __maybe_unused disable_igd(void)
27 {
28 	/*
29 	 * According to Atom E6xx datasheet, setting VGA Disable (bit17)
30 	 * of Graphics Controller register (offset 0x50) prevents IGD
31 	 * (D2:F0) from reporting itself as a VGA display controller
32 	 * class in the PCI configuration space, and should also prevent
33 	 * it from responding to VGA legacy memory range and I/O addresses.
34 	 *
35 	 * However test result shows that with just VGA Disable bit set and
36 	 * a PCIe graphics card connected to one of the PCIe controllers on
37 	 * the E6xx, accessing the VGA legacy space still causes system hang.
38 	 * After a number of attempts, it turns out besides VGA Disable bit,
39 	 * the SDVO (D3:F0) device should be disabled to make it work.
40 	 *
41 	 * To simplify, use the Function Disable register (offset 0xc4)
42 	 * to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these
43 	 * two devices will be completely disabled (invisible in the PCI
44 	 * configuration space) unless a system reset is performed.
45 	 */
46 	x86_pci_write_config32(TNC_IGD, IGD_FD, FUNC_DISABLE);
47 	x86_pci_write_config32(TNC_SDVO, IGD_FD, FUNC_DISABLE);
48 }
49 
50 int arch_cpu_init(void)
51 {
52 	int ret;
53 
54 	post_code(POST_CPU_INIT);
55 
56 	ret = x86_cpu_init_f();
57 	if (ret)
58 		return ret;
59 
60 	return 0;
61 }
62 
63 int arch_early_init_r(void)
64 {
65 #ifdef CONFIG_DISABLE_IGD
66 	disable_igd();
67 #endif
68 
69 	return 0;
70 }
71 
72 int arch_misc_init(void)
73 {
74 	unprotect_spi_flash();
75 
76 	return 0;
77 }
78