1# SPDX-License-Identifier: GPL-2.0+ 2# 3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 4 5config INTEL_QUEENSBAY 6 bool 7 select HAVE_FSP 8 select HAVE_CMC 9 select ARCH_EARLY_INIT_R 10 imply AHCI_PCI 11 imply ICH_SPI 12 imply INTEL_ICH6_GPIO 13 imply MMC 14 imply MMC_PCI 15 imply MMC_SDHCI 16 imply MMC_SDHCI_SDMA 17 imply PCH_GBE 18 imply SCSI 19 imply SCSI_AHCI 20 imply SPI_FLASH 21 imply SYS_NS16550 22 imply USB 23 imply USB_EHCI_HCD 24 imply VIDEO_VESA 25 26if INTEL_QUEENSBAY 27 28config HAVE_CMC 29 bool "Add a Chipset Micro Code state machine binary" 30 help 31 Select this option to add a Chipset Micro Code state machine binary 32 to the resulting U-Boot image. It is a 64K data block of machine 33 specific code which must be put in the flash for the processor to 34 access when powered up before system BIOS is executed. 35 36config CMC_FILE 37 string "Chipset Micro Code state machine filename" 38 depends on HAVE_CMC 39 default "cmc.bin" 40 help 41 The filename of the file to use as Chipset Micro Code state machine 42 binary in the board directory. 43 44config CMC_ADDR 45 hex "Chipset Micro Code state machine binary location" 46 depends on HAVE_CMC 47 default 0xfffb0000 48 help 49 The location of the CMC binary is determined by a strap. It must be 50 put in flash at a location matching the strap-determined base address. 51 52 The default base address of 0xfffb0000 indicates that the binary must 53 be located at offset 0xb0000 from the beginning of a 1MB flash device. 54 55config CPU_ADDR_BITS 56 int 57 default 32 58 59config DISABLE_IGD 60 bool "Disable Integrated Graphics Device (IGD)" 61 help 62 Disable the Integrated Graphics Device (IGD) so that it does not 63 show in the PCI configuration space as a VGA disaplay controller. 64 This gives a chance for U-Boot to run PCI/PCIe based graphics 65 card's VGA BIOS and use that card for the graphics console. 66 67endif 68