xref: /openbmc/u-boot/arch/x86/cpu/queensbay/Kconfig (revision 7fd65ef5)
1#
2# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3#
4# SPDX-License-Identifier:	GPL-2.0+
5#
6
7config INTEL_QUEENSBAY
8	bool
9	select HAVE_FSP
10	select HAVE_CMC
11	select ARCH_EARLY_INIT_R
12	imply AHCI_PCI
13	imply ICH_SPI
14	imply INTEL_ICH6_GPIO
15	imply MMC
16	imply MMC_PCI
17	imply MMC_SDHCI
18	imply MMC_SDHCI_SDMA
19	imply PCH_GBE
20	imply SCSI
21	imply SCSI_AHCI
22	imply SPI_FLASH
23	imply SYS_NS16550
24	imply USB
25	imply USB_EHCI_HCD
26	imply VIDEO_VESA
27
28if INTEL_QUEENSBAY
29
30config HAVE_CMC
31	bool "Add a Chipset Micro Code state machine binary"
32	help
33	  Select this option to add a Chipset Micro Code state machine binary
34	  to the resulting U-Boot image. It is a 64K data block of machine
35	  specific code which must be put in the flash for the processor to
36	  access when powered up before system BIOS is executed.
37
38config CMC_FILE
39	string "Chipset Micro Code state machine filename"
40	depends on HAVE_CMC
41	default "cmc.bin"
42	help
43	  The filename of the file to use as Chipset Micro Code state machine
44	  binary in the board directory.
45
46config CMC_ADDR
47	hex "Chipset Micro Code state machine binary location"
48	depends on HAVE_CMC
49	default 0xfffb0000
50	help
51	  The location of the CMC binary is determined by a strap. It must be
52	  put in flash at a location matching the strap-determined base address.
53
54	  The default base address of 0xfffb0000 indicates that the binary must
55	  be located at offset 0xb0000 from the beginning of a 1MB flash device.
56
57config CPU_ADDR_BITS
58	int
59	default 32
60
61config DISABLE_IGD
62	bool "Disable Integrated Graphics Device (IGD)"
63	help
64	  Disable the Integrated Graphics Device (IGD) so that it does not
65	  show in the PCI configuration space as a VGA disaplay controller.
66	  This gives a chance for U-Boot to run PCI/PCIe based graphics
67	  card's VGA BIOS and use that card for the graphics console.
68
69endif
70