xref: /openbmc/u-boot/arch/x86/cpu/queensbay/Kconfig (revision 1df7f0b6a00c2080c50de775b4ef621aad24c47e)
1#
2# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3#
4# SPDX-License-Identifier:	GPL-2.0+
5#
6
7config INTEL_QUEENSBAY
8	bool
9	select HAVE_FSP
10	select HAVE_CMC
11	select ARCH_EARLY_INIT_R
12	imply ENV_IS_IN_SPI_FLASH
13	imply ICH_SPI
14	imply MMC
15	imply MMC_PCI
16	imply MMC_SDHCI
17	imply MMC_SDHCI_SDMA
18	imply PCH_GBE
19	imply SCSI
20	imply SPI_FLASH
21	imply SYS_NS16550
22	imply VIDEO_VESA
23
24if INTEL_QUEENSBAY
25
26config HAVE_CMC
27	bool "Add a Chipset Micro Code state machine binary"
28	help
29	  Select this option to add a Chipset Micro Code state machine binary
30	  to the resulting U-Boot image. It is a 64K data block of machine
31	  specific code which must be put in the flash for the processor to
32	  access when powered up before system BIOS is executed.
33
34config CMC_FILE
35	string "Chipset Micro Code state machine filename"
36	depends on HAVE_CMC
37	default "cmc.bin"
38	help
39	  The filename of the file to use as Chipset Micro Code state machine
40	  binary in the board directory.
41
42config CMC_ADDR
43	hex "Chipset Micro Code state machine binary location"
44	depends on HAVE_CMC
45	default 0xfffb0000
46	help
47	  The location of the CMC binary is determined by a strap. It must be
48	  put in flash at a location matching the strap-determined base address.
49
50	  The default base address of 0xfffb0000 indicates that the binary must
51	  be located at offset 0xb0000 from the beginning of a 1MB flash device.
52
53config CPU_ADDR_BITS
54	int
55	default 32
56
57config DISABLE_IGD
58	bool "Disable Integrated Graphics Device (IGD)"
59	help
60	  Disable the Integrated Graphics Device (IGD) so that it does not
61	  show in the PCI configuration space as a VGA disaplay controller.
62	  This gives a chance for U-Boot to run PCI/PCIe based graphics
63	  card's VGA BIOS and use that card for the graphics console.
64
65endif
66