xref: /openbmc/u-boot/arch/x86/cpu/quark/Kconfig (revision e30d2bd4)
1#
2# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3#
4# SPDX-License-Identifier:	GPL-2.0+
5#
6
7config INTEL_QUARK
8	bool
9	select HAVE_RMU
10
11if INTEL_QUARK
12
13config HAVE_RMU
14	bool "Add a Remote Management Unit (RMU) binary"
15	help
16	  Select this option to add a Remote Management Unit (RMU) binary
17	  to the resulting U-Boot image. It is a data block (up to 64K) of
18	  machine-specific code which must be put in the flash for the RMU
19	  within the Quark SoC processor to access when powered up before
20	  system BIOS is executed.
21
22config RMU_FILE
23	string "Remote Management Unit (RMU) binary filename"
24	depends on HAVE_RMU
25	default "rmu.bin"
26	help
27	  The filename of the file to use as Remote Management Unit (RMU)
28	  binary in the board directory.
29
30config RMU_ADDR
31	hex "Remote Management Unit (RMU) binary location"
32	depends on HAVE_RMU
33	default 0xfff00000
34	help
35	  The location of the RMU binary is determined by a strap. It must be
36	  put in flash at a location matching the strap-determined base address.
37
38	  The default base address of 0xfff00000 indicates that the binary must
39	  be located at offset 0 from the beginning of a 1MB flash device.
40
41config HAVE_CMC
42	bool
43	default HAVE_RMU
44
45config CMC_FILE
46	string
47	depends on HAVE_CMC
48	default RMU_FILE
49
50config CMC_ADDR
51	hex
52	depends on HAVE_CMC
53	default RMU_ADDR
54
55config ESRAM_BASE
56	hex
57	default 0x80000000
58	help
59	  Embedded SRAM (eSRAM) memory-mapped base address.
60
61config PCIE_ECAM_BASE
62	hex
63	default 0xe0000000
64
65config RCBA_BASE
66	hex
67	default 0xfed1c000
68	help
69	  Root Complex register block memory-mapped base address.
70
71config ACPI_PM1_BASE
72	hex
73	default 0x1000
74	help
75	  ACPI Power Managment 1 (PM1) i/o-mapped base address.
76	  This device is defined in ACPI specification, with 16 bytes in size.
77
78config ACPI_PBLK_BASE
79	hex
80	default 0x1010
81	help
82	  ACPI Processor Block (PBLK) i/o-mapped base address.
83	  This device is defined in ACPI specification, with 16 bytes in size.
84
85config SPI_DMA_BASE
86	hex
87	default 0x1020
88	help
89	  SPI DMA i/o-mapped base address.
90
91config GPIO_BASE
92	hex
93	default 0x1080
94	help
95	  GPIO i/o-mapped base address.
96
97config ACPI_GPE0_BASE
98	hex
99	default 0x1100
100	help
101	  ACPI General Purpose Event 0 (GPE0) i/o-mapped base address.
102	  This device is defined in ACPI specification, with 64 bytes in size.
103
104config WDT_BASE
105	hex
106	default 0x1140
107	help
108	  Watchdog timer i/o-mapped base address.
109
110config SYS_CAR_ADDR
111	hex
112	default ESRAM_BASE
113
114config SYS_CAR_SIZE
115	hex
116	default 0x8000
117	help
118	  Space in bytes in eSRAM used as Cache-As-ARM (CAR).
119	  Note this size must not exceed eSRAM's total size.
120
121endif
122