1# 2# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3# 4# SPDX-License-Identifier: GPL-2.0+ 5# 6 7config INTEL_QUARK 8 bool 9 select HAVE_RMU 10 select TSC_CALIBRATION_BYPASS 11 12if INTEL_QUARK 13 14config HAVE_RMU 15 bool "Add a Remote Management Unit (RMU) binary" 16 help 17 Select this option to add a Remote Management Unit (RMU) binary 18 to the resulting U-Boot image. It is a data block (up to 64K) of 19 machine-specific code which must be put in the flash for the RMU 20 within the Quark SoC processor to access when powered up before 21 system BIOS is executed. 22 23config RMU_FILE 24 string "Remote Management Unit (RMU) binary filename" 25 depends on HAVE_RMU 26 default "rmu.bin" 27 help 28 The filename of the file to use as Remote Management Unit (RMU) 29 binary in the board directory. 30 31config RMU_ADDR 32 hex "Remote Management Unit (RMU) binary location" 33 depends on HAVE_RMU 34 default 0xfff00000 35 help 36 The location of the RMU binary is determined by a strap. It must be 37 put in flash at a location matching the strap-determined base address. 38 39 The default base address of 0xfff00000 indicates that the binary must 40 be located at offset 0 from the beginning of a 1MB flash device. 41 42config HAVE_CMC 43 bool 44 default HAVE_RMU 45 46config CMC_FILE 47 string 48 depends on HAVE_CMC 49 default RMU_FILE 50 51config CMC_ADDR 52 hex 53 depends on HAVE_CMC 54 default RMU_ADDR 55 56config ESRAM_BASE 57 hex 58 default 0x80000000 59 help 60 Embedded SRAM (eSRAM) memory-mapped base address. 61 62config PCIE_ECAM_BASE 63 hex 64 default 0xe0000000 65 66config RCBA_BASE 67 hex 68 default 0xfed1c000 69 help 70 Root Complex register block memory-mapped base address. 71 72config ACPI_PM1_BASE 73 hex 74 default 0x1000 75 help 76 ACPI Power Managment 1 (PM1) i/o-mapped base address. 77 This device is defined in ACPI specification, with 16 bytes in size. 78 79config ACPI_PBLK_BASE 80 hex 81 default 0x1010 82 help 83 ACPI Processor Block (PBLK) i/o-mapped base address. 84 This device is defined in ACPI specification, with 16 bytes in size. 85 86config SPI_DMA_BASE 87 hex 88 default 0x1020 89 help 90 SPI DMA i/o-mapped base address. 91 92config GPIO_BASE 93 hex 94 default 0x1080 95 help 96 GPIO i/o-mapped base address. 97 98config ACPI_GPE0_BASE 99 hex 100 default 0x1100 101 help 102 ACPI General Purpose Event 0 (GPE0) i/o-mapped base address. 103 This device is defined in ACPI specification, with 64 bytes in size. 104 105config WDT_BASE 106 hex 107 default 0x1140 108 help 109 Watchdog timer i/o-mapped base address. 110 111config SYS_CAR_ADDR 112 hex 113 default ESRAM_BASE 114 115config SYS_CAR_SIZE 116 hex 117 default 0x8000 118 help 119 Space in bytes in eSRAM used as Cache-As-ARM (CAR). 120 Note this size must not exceed eSRAM's total size. 121 122config TSC_FREQ_IN_MHZ 123 int 124 default 400 125 126endif 127