1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2008,2009 4 * Graeme Russ, <graeme.russ@gmail.com> 5 * 6 * (C) Copyright 2002 7 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #include <common.h> 13 #include <dm.h> 14 #include <errno.h> 15 #include <malloc.h> 16 #include <pci.h> 17 #include <asm/io.h> 18 #include <asm/pci.h> 19 20 int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, 21 ulong *valuep, enum pci_size_t size) 22 { 23 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); 24 switch (size) { 25 case PCI_SIZE_8: 26 *valuep = inb(PCI_REG_DATA + (offset & 3)); 27 break; 28 case PCI_SIZE_16: 29 *valuep = inw(PCI_REG_DATA + (offset & 2)); 30 break; 31 case PCI_SIZE_32: 32 *valuep = inl(PCI_REG_DATA); 33 break; 34 } 35 36 return 0; 37 } 38 39 int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, 40 ulong value, enum pci_size_t size) 41 { 42 outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); 43 switch (size) { 44 case PCI_SIZE_8: 45 outb(value, PCI_REG_DATA + (offset & 3)); 46 break; 47 case PCI_SIZE_16: 48 outw(value, PCI_REG_DATA + (offset & 2)); 49 break; 50 case PCI_SIZE_32: 51 outl(value, PCI_REG_DATA); 52 break; 53 } 54 55 return 0; 56 } 57 58 void pci_assign_irqs(int bus, int device, u8 irq[4]) 59 { 60 pci_dev_t bdf; 61 int func; 62 u16 vendor; 63 u8 pin, line; 64 65 for (func = 0; func < 8; func++) { 66 bdf = PCI_BDF(bus, device, func); 67 pci_read_config16(bdf, PCI_VENDOR_ID, &vendor); 68 if (vendor == 0xffff || vendor == 0x0000) 69 continue; 70 71 pci_read_config8(bdf, PCI_INTERRUPT_PIN, &pin); 72 73 /* PCI spec says all values except 1..4 are reserved */ 74 if ((pin < 1) || (pin > 4)) 75 continue; 76 77 line = irq[pin - 1]; 78 if (!line) 79 continue; 80 81 debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", 82 line, bus, device, func, 'A' + pin - 1); 83 84 pci_write_config8(bdf, PCI_INTERRUPT_LINE, line); 85 } 86 } 87