1d188b18fSSimon Glass /* 2d188b18fSSimon Glass * Copyright (c) 2011 The Chromium OS Authors. 3d188b18fSSimon Glass * (C) Copyright 2008,2009 4d188b18fSSimon Glass * Graeme Russ, <graeme.russ@gmail.com> 5d188b18fSSimon Glass * 6d188b18fSSimon Glass * (C) Copyright 2002 7d188b18fSSimon Glass * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> 8d188b18fSSimon Glass * 9d188b18fSSimon Glass * SPDX-License-Identifier: GPL-2.0+ 10d188b18fSSimon Glass */ 11d188b18fSSimon Glass 12d188b18fSSimon Glass #include <common.h> 13a219daeaSSimon Glass #include <dm.h> 147430f108SSimon Glass #include <errno.h> 157430f108SSimon Glass #include <malloc.h> 16d188b18fSSimon Glass #include <pci.h> 17a219daeaSSimon Glass #include <asm/io.h> 18d188b18fSSimon Glass #include <asm/pci.h> 19d188b18fSSimon Glass 204722c035SBin Meng DECLARE_GLOBAL_DATA_PTR; 214722c035SBin Meng 22d188b18fSSimon Glass static struct pci_controller x86_hose; 23d188b18fSSimon Glass 247430f108SSimon Glass int pci_early_init_hose(struct pci_controller **hosep) 257430f108SSimon Glass { 267430f108SSimon Glass struct pci_controller *hose; 277430f108SSimon Glass 287430f108SSimon Glass hose = calloc(1, sizeof(struct pci_controller)); 297430f108SSimon Glass if (!hose) 307430f108SSimon Glass return -ENOMEM; 317430f108SSimon Glass 327430f108SSimon Glass board_pci_setup_hose(hose); 337430f108SSimon Glass pci_setup_type1(hose); 34fa5530b8SBin Meng hose->last_busno = pci_hose_scan(hose); 358f9052fdSBin Meng gd->hose = hose; 367430f108SSimon Glass *hosep = hose; 377430f108SSimon Glass 387430f108SSimon Glass return 0; 397430f108SSimon Glass } 407430f108SSimon Glass 41e94ea6f6SSimon Glass __weak int board_pci_pre_scan(struct pci_controller *hose) 42e94ea6f6SSimon Glass { 43e94ea6f6SSimon Glass return 0; 44e94ea6f6SSimon Glass } 45e94ea6f6SSimon Glass 46e94ea6f6SSimon Glass __weak int board_pci_post_scan(struct pci_controller *hose) 47e94ea6f6SSimon Glass { 48e94ea6f6SSimon Glass return 0; 49e94ea6f6SSimon Glass } 50e94ea6f6SSimon Glass 51d188b18fSSimon Glass void pci_init_board(void) 52d188b18fSSimon Glass { 53d188b18fSSimon Glass struct pci_controller *hose = &x86_hose; 54d188b18fSSimon Glass 557430f108SSimon Glass /* Stop using the early hose */ 568f9052fdSBin Meng gd->hose = NULL; 577430f108SSimon Glass 58d188b18fSSimon Glass board_pci_setup_hose(hose); 59d188b18fSSimon Glass pci_setup_type1(hose); 60d188b18fSSimon Glass pci_register_hose(hose); 61d188b18fSSimon Glass 62e94ea6f6SSimon Glass board_pci_pre_scan(hose); 63d188b18fSSimon Glass hose->last_busno = pci_hose_scan(hose); 64e94ea6f6SSimon Glass board_pci_post_scan(hose); 65d188b18fSSimon Glass } 666fb3b72eSSimon Glass 676fb3b72eSSimon Glass static struct pci_controller *get_hose(void) 686fb3b72eSSimon Glass { 698f9052fdSBin Meng if (gd->hose) 708f9052fdSBin Meng return gd->hose; 716fb3b72eSSimon Glass 726fb3b72eSSimon Glass return pci_bus_to_hose(0); 736fb3b72eSSimon Glass } 746fb3b72eSSimon Glass 7531f57c28SSimon Glass unsigned int x86_pci_read_config8(pci_dev_t dev, unsigned where) 766fb3b72eSSimon Glass { 776fb3b72eSSimon Glass uint8_t value; 786fb3b72eSSimon Glass 79*052e34b3SSimon Glass if (pci_hose_read_config_byte(get_hose(), dev, where, &value)) 80*052e34b3SSimon Glass return -1U; 816fb3b72eSSimon Glass 826fb3b72eSSimon Glass return value; 836fb3b72eSSimon Glass } 846fb3b72eSSimon Glass 8531f57c28SSimon Glass unsigned int x86_pci_read_config16(pci_dev_t dev, unsigned where) 866fb3b72eSSimon Glass { 876fb3b72eSSimon Glass uint16_t value; 886fb3b72eSSimon Glass 89*052e34b3SSimon Glass if (pci_hose_read_config_word(get_hose(), dev, where, &value)) 90*052e34b3SSimon Glass return -1U; 916fb3b72eSSimon Glass 926fb3b72eSSimon Glass return value; 936fb3b72eSSimon Glass } 946fb3b72eSSimon Glass 9531f57c28SSimon Glass unsigned int x86_pci_read_config32(pci_dev_t dev, unsigned where) 966fb3b72eSSimon Glass { 976fb3b72eSSimon Glass uint32_t value; 986fb3b72eSSimon Glass 99*052e34b3SSimon Glass if (pci_hose_read_config_dword(get_hose(), dev, where, &value)) 100*052e34b3SSimon Glass return -1U; 1016fb3b72eSSimon Glass 1026fb3b72eSSimon Glass return value; 1036fb3b72eSSimon Glass } 1046fb3b72eSSimon Glass 10531f57c28SSimon Glass void x86_pci_write_config8(pci_dev_t dev, unsigned where, unsigned value) 1066fb3b72eSSimon Glass { 1076fb3b72eSSimon Glass pci_hose_write_config_byte(get_hose(), dev, where, value); 1086fb3b72eSSimon Glass } 1096fb3b72eSSimon Glass 11031f57c28SSimon Glass void x86_pci_write_config16(pci_dev_t dev, unsigned where, unsigned value) 1116fb3b72eSSimon Glass { 1126fb3b72eSSimon Glass pci_hose_write_config_word(get_hose(), dev, where, value); 1136fb3b72eSSimon Glass } 1146fb3b72eSSimon Glass 11531f57c28SSimon Glass void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value) 1166fb3b72eSSimon Glass { 1176fb3b72eSSimon Glass pci_hose_write_config_dword(get_hose(), dev, where, value); 1186fb3b72eSSimon Glass } 119a219daeaSSimon Glass 120a219daeaSSimon Glass int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, 121a219daeaSSimon Glass ulong *valuep, enum pci_size_t size) 122a219daeaSSimon Glass { 123a219daeaSSimon Glass outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); 124a219daeaSSimon Glass switch (size) { 125a219daeaSSimon Glass case PCI_SIZE_8: 126a219daeaSSimon Glass *valuep = inb(PCI_REG_DATA + (offset & 3)); 127a219daeaSSimon Glass break; 128a219daeaSSimon Glass case PCI_SIZE_16: 129a219daeaSSimon Glass *valuep = inw(PCI_REG_DATA + (offset & 2)); 130a219daeaSSimon Glass break; 131a219daeaSSimon Glass case PCI_SIZE_32: 132a219daeaSSimon Glass *valuep = inl(PCI_REG_DATA); 133a219daeaSSimon Glass break; 134a219daeaSSimon Glass } 135a219daeaSSimon Glass 136a219daeaSSimon Glass return 0; 137a219daeaSSimon Glass } 138a219daeaSSimon Glass 139a219daeaSSimon Glass int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, 140a219daeaSSimon Glass ulong value, enum pci_size_t size) 141a219daeaSSimon Glass { 142a219daeaSSimon Glass outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); 143a219daeaSSimon Glass switch (size) { 144a219daeaSSimon Glass case PCI_SIZE_8: 145a219daeaSSimon Glass outb(value, PCI_REG_DATA + (offset & 3)); 146a219daeaSSimon Glass break; 147a219daeaSSimon Glass case PCI_SIZE_16: 148a219daeaSSimon Glass outw(value, PCI_REG_DATA + (offset & 2)); 149a219daeaSSimon Glass break; 150a219daeaSSimon Glass case PCI_SIZE_32: 151a219daeaSSimon Glass outl(value, PCI_REG_DATA); 152a219daeaSSimon Glass break; 153a219daeaSSimon Glass } 154a219daeaSSimon Glass 155a219daeaSSimon Glass return 0; 156a219daeaSSimon Glass } 157e3e7fa2cSBin Meng 15831a2dc69SBin Meng void pci_assign_irqs(int bus, int device, u8 irq[4]) 159e3e7fa2cSBin Meng { 160e3e7fa2cSBin Meng pci_dev_t bdf; 16131a2dc69SBin Meng int func; 16231a2dc69SBin Meng u16 vendor; 163e3e7fa2cSBin Meng u8 pin, line; 164e3e7fa2cSBin Meng 16531a2dc69SBin Meng for (func = 0; func < 8; func++) { 166e3e7fa2cSBin Meng bdf = PCI_BDF(bus, device, func); 16731a2dc69SBin Meng vendor = x86_pci_read_config16(bdf, PCI_VENDOR_ID); 16831a2dc69SBin Meng if (vendor == 0xffff || vendor == 0x0000) 16931a2dc69SBin Meng continue; 170e3e7fa2cSBin Meng 171e3e7fa2cSBin Meng pin = x86_pci_read_config8(bdf, PCI_INTERRUPT_PIN); 172e3e7fa2cSBin Meng 173e3e7fa2cSBin Meng /* PCI spec says all values except 1..4 are reserved */ 174e3e7fa2cSBin Meng if ((pin < 1) || (pin > 4)) 17531a2dc69SBin Meng continue; 176e3e7fa2cSBin Meng 177e3e7fa2cSBin Meng line = irq[pin - 1]; 1786fc0e8a1SBin Meng if (!line) 1796fc0e8a1SBin Meng continue; 180e3e7fa2cSBin Meng 181e3e7fa2cSBin Meng debug("Assigning IRQ %d to PCI device %d.%x.%d (INT%c)\n", 182e3e7fa2cSBin Meng line, bus, device, func, 'A' + pin - 1); 183e3e7fa2cSBin Meng 184e3e7fa2cSBin Meng x86_pci_write_config8(bdf, PCI_INTERRUPT_LINE, line); 185e3e7fa2cSBin Meng } 18631a2dc69SBin Meng } 187