xref: /openbmc/u-boot/arch/x86/cpu/lapic.c (revision 63d54a67)
1 /*
2  * From coreboot file of same name
3  *
4  * Copyright (C) 2008-2009 coresystems GmbH
5  * Copyright (C) 2014 Google, Inc
6  *
7  * SPDX-License-Identifier:	GPL-2.0
8  */
9 
10 #include <common.h>
11 #include <asm/lapic.h>
12 #include <asm/post.h>
13 
14 void lapic_setup(void)
15 {
16 #ifdef CONFIG_SMP
17 	/* Only Pentium Pro and later have those MSR stuff */
18 	debug("Setting up local apic: ");
19 
20 	/* Enable the local apic */
21 	enable_lapic();
22 
23 	/* Set Task Priority to 'accept all' */
24 	lapic_write_around(LAPIC_TASKPRI,
25 			   lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
26 
27 	/* Put the local apic in virtual wire mode */
28 	lapic_write_around(LAPIC_SPIV, (lapic_read_around(LAPIC_SPIV) &
29 			   ~(LAPIC_VECTOR_MASK)) | LAPIC_SPIV_ENABLE);
30 	lapic_write_around(LAPIC_LVT0, (lapic_read_around(LAPIC_LVT0) &
31 			   ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
32 			   LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
33 			   LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
34 			   LAPIC_DELIVERY_MODE_MASK)) |
35 			   (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
36 			   LAPIC_DELIVERY_MODE_EXTINT));
37 	lapic_write_around(LAPIC_LVT1, (lapic_read_around(LAPIC_LVT1) &
38 			   ~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
39 			   LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
40 			   LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
41 			   LAPIC_DELIVERY_MODE_MASK)) |
42 			   (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
43 			   LAPIC_DELIVERY_MODE_NMI));
44 
45 	debug("apic_id: 0x%02lx, ", lapicid());
46 #else /* !CONFIG_SMP */
47 	/* Only Pentium Pro and later have those MSR stuff */
48 	debug("Disabling local apic: ");
49 	disable_lapic();
50 #endif /* CONFIG_SMP */
51 	debug("done.\n");
52 	post_code(POST_LAPIC);
53 }
54