1 /* 2 * (C) Copyright 2008-2011 3 * Graeme Russ, <graeme.russ@gmail.com> 4 * 5 * (C) Copyright 2002 6 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> 7 * 8 * (C) Copyright 2002 9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 10 * Marius Groeger <mgroeger@sysgo.de> 11 * 12 * (C) Copyright 2002 13 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 14 * Alex Zuepke <azu@sysgo.de> 15 * 16 * See file CREDITS for list of people who contributed to this 17 * project. 18 * 19 * This program is free software; you can redistribute it and/or 20 * modify it under the terms of the GNU General Public License as 21 * published by the Free Software Foundation; either version 2 of 22 * the License, or (at your option) any later version. 23 * 24 * This program is distributed in the hope that it will be useful, 25 * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 * GNU General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, write to the Free Software 31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 32 * MA 02111-1307 USA 33 */ 34 35 #include <common.h> 36 #include <command.h> 37 #include <asm/control_regs.h> 38 #include <asm/processor.h> 39 #include <asm/processor-flags.h> 40 #include <asm/interrupt.h> 41 #include <linux/compiler.h> 42 43 /* 44 * Constructor for a conventional segment GDT (or LDT) entry 45 * This is a macro so it can be used in initialisers 46 */ 47 #define GDT_ENTRY(flags, base, limit) \ 48 ((((base) & 0xff000000ULL) << (56-24)) | \ 49 (((flags) & 0x0000f0ffULL) << 40) | \ 50 (((limit) & 0x000f0000ULL) << (48-16)) | \ 51 (((base) & 0x00ffffffULL) << 16) | \ 52 (((limit) & 0x0000ffffULL))) 53 54 struct gdt_ptr { 55 u16 len; 56 u32 ptr; 57 } __packed; 58 59 static void load_ds(u32 segment) 60 { 61 asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE)); 62 } 63 64 static void load_es(u32 segment) 65 { 66 asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE)); 67 } 68 69 static void load_fs(u32 segment) 70 { 71 asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE)); 72 } 73 74 static void load_gs(u32 segment) 75 { 76 asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE)); 77 } 78 79 static void load_ss(u32 segment) 80 { 81 asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE)); 82 } 83 84 static void load_gdt(const u64 *boot_gdt, u16 num_entries) 85 { 86 struct gdt_ptr gdt; 87 88 gdt.len = (num_entries * 8) - 1; 89 gdt.ptr = (u32)boot_gdt; 90 91 asm volatile("lgdtl %0\n" : : "m" (gdt)); 92 } 93 94 void setup_gdt(gd_t *id, u64 *gdt_addr) 95 { 96 /* CS: code, read/execute, 4 GB, base 0 */ 97 gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff); 98 99 /* DS: data, read/write, 4 GB, base 0 */ 100 gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff); 101 102 /* FS: data, read/write, 4 GB, base (Global Data Pointer) */ 103 id->arch.gd_addr = id; 104 gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, 105 (ulong)&id->arch.gd_addr, 0xfffff); 106 107 /* 16-bit CS: code, read/execute, 64 kB, base 0 */ 108 gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff); 109 110 /* 16-bit DS: data, read/write, 64 kB, base 0 */ 111 gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff); 112 113 load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES); 114 load_ds(X86_GDT_ENTRY_32BIT_DS); 115 load_es(X86_GDT_ENTRY_32BIT_DS); 116 load_gs(X86_GDT_ENTRY_32BIT_DS); 117 load_ss(X86_GDT_ENTRY_32BIT_DS); 118 load_fs(X86_GDT_ENTRY_32BIT_FS); 119 } 120 121 int __weak x86_cleanup_before_linux(void) 122 { 123 #ifdef CONFIG_BOOTSTAGE_STASH 124 bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH, 125 CONFIG_BOOTSTAGE_STASH_SIZE); 126 #endif 127 128 return 0; 129 } 130 131 int x86_cpu_init_f(void) 132 { 133 const u32 em_rst = ~X86_CR0_EM; 134 const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE; 135 136 /* initialize FPU, reset EM, set MP and NE */ 137 asm ("fninit\n" \ 138 "movl %%cr0, %%eax\n" \ 139 "andl %0, %%eax\n" \ 140 "orl %1, %%eax\n" \ 141 "movl %%eax, %%cr0\n" \ 142 : : "i" (em_rst), "i" (mp_ne_set) : "eax"); 143 144 return 0; 145 } 146 int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f"))); 147 148 int x86_cpu_init_r(void) 149 { 150 /* Initialize core interrupt and exception functionality of CPU */ 151 cpu_init_interrupts(); 152 return 0; 153 } 154 int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); 155 156 void x86_enable_caches(void) 157 { 158 unsigned long cr0; 159 160 cr0 = read_cr0(); 161 cr0 &= ~(X86_CR0_NW | X86_CR0_CD); 162 write_cr0(cr0); 163 wbinvd(); 164 } 165 void enable_caches(void) __attribute__((weak, alias("x86_enable_caches"))); 166 167 void x86_disable_caches(void) 168 { 169 unsigned long cr0; 170 171 cr0 = read_cr0(); 172 cr0 |= X86_CR0_NW | X86_CR0_CD; 173 wbinvd(); 174 write_cr0(cr0); 175 wbinvd(); 176 } 177 void disable_caches(void) __attribute__((weak, alias("x86_disable_caches"))); 178 179 int x86_init_cache(void) 180 { 181 enable_caches(); 182 183 return 0; 184 } 185 int init_cache(void) __attribute__((weak, alias("x86_init_cache"))); 186 187 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 188 { 189 printf("resetting ...\n"); 190 191 /* wait 50 ms */ 192 udelay(50000); 193 disable_interrupts(); 194 reset_cpu(0); 195 196 /*NOTREACHED*/ 197 return 0; 198 } 199 200 void flush_cache(unsigned long dummy1, unsigned long dummy2) 201 { 202 asm("wbinvd\n"); 203 } 204 205 void __attribute__ ((regparm(0))) generate_gpf(void); 206 207 /* segment 0x70 is an arbitrary segment which does not exist */ 208 asm(".globl generate_gpf\n" 209 ".hidden generate_gpf\n" 210 ".type generate_gpf, @function\n" 211 "generate_gpf:\n" 212 "ljmp $0x70, $0x47114711\n"); 213 214 void __reset_cpu(ulong addr) 215 { 216 printf("Resetting using x86 Triple Fault\n"); 217 set_vector(13, generate_gpf); /* general protection fault handler */ 218 set_vector(8, generate_gpf); /* double fault handler */ 219 generate_gpf(); /* start the show */ 220 } 221 void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); 222 223 int dcache_status(void) 224 { 225 return !(read_cr0() & 0x40000000); 226 } 227 228 /* Define these functions to allow ehch-hcd to function */ 229 void flush_dcache_range(unsigned long start, unsigned long stop) 230 { 231 } 232 233 void invalidate_dcache_range(unsigned long start, unsigned long stop) 234 { 235 } 236 237 void dcache_enable(void) 238 { 239 enable_caches(); 240 } 241 242 void dcache_disable(void) 243 { 244 disable_caches(); 245 } 246 247 void icache_enable(void) 248 { 249 } 250 251 void icache_disable(void) 252 { 253 } 254 255 int icache_status(void) 256 { 257 return 1; 258 } 259