xref: /openbmc/u-boot/arch/x86/cpu/cpu.c (revision 4e3349b6)
1 /*
2  * (C) Copyright 2008-2011
3  * Graeme Russ, <graeme.russ@gmail.com>
4  *
5  * (C) Copyright 2002
6  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
7  *
8  * (C) Copyright 2002
9  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10  * Marius Groeger <mgroeger@sysgo.de>
11  *
12  * (C) Copyright 2002
13  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
14  * Alex Zuepke <azu@sysgo.de>
15  *
16  * See file CREDITS for list of people who contributed to this
17  * project.
18  *
19  * This program is free software; you can redistribute it and/or
20  * modify it under the terms of the GNU General Public License as
21  * published by the Free Software Foundation; either version 2 of
22  * the License, or (at your option) any later version.
23  *
24  * This program is distributed in the hope that it will be useful,
25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
27  * GNU General Public License for more details.
28  *
29  * You should have received a copy of the GNU General Public License
30  * along with this program; if not, write to the Free Software
31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32  * MA 02111-1307 USA
33  */
34 
35 #include <common.h>
36 #include <command.h>
37 #include <asm/processor.h>
38 #include <asm/processor-flags.h>
39 #include <asm/interrupt.h>
40 #include <linux/compiler.h>
41 
42 /*
43  * Constructor for a conventional segment GDT (or LDT) entry
44  * This is a macro so it can be used in initialisers
45  */
46 #define GDT_ENTRY(flags, base, limit)			\
47 	((((base)  & 0xff000000ULL) << (56-24)) |	\
48 	 (((flags) & 0x0000f0ffULL) << 40) |		\
49 	 (((limit) & 0x000f0000ULL) << (48-16)) |	\
50 	 (((base)  & 0x00ffffffULL) << 16) |		\
51 	 (((limit) & 0x0000ffffULL)))
52 
53 struct gdt_ptr {
54 	u16 len;
55 	u32 ptr;
56 } __packed;
57 
58 static void load_ds(u32 segment)
59 {
60 	asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
61 }
62 
63 static void load_es(u32 segment)
64 {
65 	asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE));
66 }
67 
68 static void load_fs(u32 segment)
69 {
70 	asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
71 }
72 
73 static void load_gs(u32 segment)
74 {
75 	asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
76 }
77 
78 static void load_ss(u32 segment)
79 {
80 	asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE));
81 }
82 
83 static void load_gdt(const u64 *boot_gdt, u16 num_entries)
84 {
85 	struct gdt_ptr gdt;
86 
87 	gdt.len = (num_entries * 8) - 1;
88 	gdt.ptr = (u32)boot_gdt;
89 
90 	asm volatile("lgdtl %0\n" : : "m" (gdt));
91 }
92 
93 void init_gd(gd_t *id, u64 *gdt_addr)
94 {
95 	id->gd_addr = (ulong)id;
96 	setup_gdt(id, gdt_addr);
97 }
98 
99 void setup_gdt(gd_t *id, u64 *gdt_addr)
100 {
101 	/* CS: code, read/execute, 4 GB, base 0 */
102 	gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
103 
104 	/* DS: data, read/write, 4 GB, base 0 */
105 	gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
106 
107 	/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
108 	gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, (ulong)id, 0xfffff);
109 
110 	/* 16-bit CS: code, read/execute, 64 kB, base 0 */
111 	gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
112 
113 	/* 16-bit DS: data, read/write, 64 kB, base 0 */
114 	gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
115 
116 	load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
117 	load_ds(X86_GDT_ENTRY_32BIT_DS);
118 	load_es(X86_GDT_ENTRY_32BIT_DS);
119 	load_gs(X86_GDT_ENTRY_32BIT_DS);
120 	load_ss(X86_GDT_ENTRY_32BIT_DS);
121 	load_fs(X86_GDT_ENTRY_32BIT_FS);
122 }
123 
124 int x86_cpu_init_f(void)
125 {
126 	const u32 em_rst = ~X86_CR0_EM;
127 	const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
128 
129 	/* initialize FPU, reset EM, set MP and NE */
130 	asm ("fninit\n" \
131 	     "movl %%cr0, %%eax\n" \
132 	     "andl %0, %%eax\n" \
133 	     "orl  %1, %%eax\n" \
134 	     "movl %%eax, %%cr0\n" \
135 	     : : "i" (em_rst), "i" (mp_ne_set) : "eax");
136 
137 	return 0;
138 }
139 int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
140 
141 int x86_cpu_init_r(void)
142 {
143 	/* Initialize core interrupt and exception functionality of CPU */
144 	cpu_init_interrupts();
145 	return 0;
146 }
147 int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
148 
149 void x86_enable_caches(void)
150 {
151 	const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
152 
153 	/* turn on the cache and disable write through */
154 	asm("movl	%%cr0, %%eax\n"
155 	    "andl	%0, %%eax\n"
156 	    "movl	%%eax, %%cr0\n"
157 	    "wbinvd\n" : : "i" (nw_cd_rst) : "eax");
158 }
159 void enable_caches(void) __attribute__((weak, alias("x86_enable_caches")));
160 
161 int x86_init_cache(void)
162 {
163 	enable_caches();
164 
165 	return 0;
166 }
167 int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
168 
169 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
170 {
171 	printf("resetting ...\n");
172 
173 	/* wait 50 ms */
174 	udelay(50000);
175 	disable_interrupts();
176 	reset_cpu(0);
177 
178 	/*NOTREACHED*/
179 	return 0;
180 }
181 
182 void  flush_cache(unsigned long dummy1, unsigned long dummy2)
183 {
184 	asm("wbinvd\n");
185 }
186 
187 void __attribute__ ((regparm(0))) generate_gpf(void);
188 
189 /* segment 0x70 is an arbitrary segment which does not exist */
190 asm(".globl generate_gpf\n"
191 	".hidden generate_gpf\n"
192 	".type generate_gpf, @function\n"
193 	"generate_gpf:\n"
194 	"ljmp   $0x70, $0x47114711\n");
195 
196 void __reset_cpu(ulong addr)
197 {
198 	printf("Resetting using x86 Triple Fault\n");
199 	set_vector(13, generate_gpf);	/* general protection fault handler */
200 	set_vector(8, generate_gpf);	/* double fault handler */
201 	generate_gpf();			/* start the show */
202 }
203 void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
204